[llvm] [AArch64][SVE] Support copy of PPR2 register class in copyPhysReg (PR #216303)

[Sander de Smalen via llvm-commits]

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@@ -5744,36 +5744,37 @@ static const MachineInstrBuilder &AddSubReg(const MachineInstrBuilder &MIB,
 }
 
 static bool forwardCopyWillClobberTuple(unsigned DestReg, unsigned SrcReg,
-                                        unsigned NumRegs) {
-  // We really want the positive remainder mod 32 here, that happens to be
+                                        unsigned NumRegs, bool IsPred) {
+  // We really want the positive remainder mod 16/32 here, that happens to be
   // easily obtainable with a mask.
-  return ((DestReg - SrcReg) & 0x1f) < NumRegs;
+  unsigned MaxRegs = IsPred ? 0xf : 0x1f;
+  return ((DestReg - SrcReg) & MaxRegs) < NumRegs;
 }
 
 void AArch64InstrInfo::copyPhysRegTuple(MachineBasicBlock &MBB,
                                         MachineBasicBlock::iterator I,
                                         const DebugLoc &DL, MCRegister DestReg,
                                         MCRegister SrcReg, bool KillSrc,
-                                        unsigned Opcode,
                                         ArrayRef<unsigned> Indices) const {
   assert(Subtarget.hasNEON() && "Unexpected register copy without NEON");
   const TargetRegisterInfo *TRI = &getRegisterInfo();
   uint16_t DestEncoding = TRI->getEncodingValue(DestReg);
   uint16_t SrcEncoding = TRI->getEncodingValue(SrcReg);
   unsigned NumRegs = Indices.size();
+  bool IsPred =
+      AArch64::PPRRegClass.contains(TRI->getSubReg(DestReg, Indices[0]));
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sdesmalen-arm wrote:

nit: to make this future proof, can this become `.. || AArch64::PNRRegClass.contains(..)` ? (or is there never a use-case for copies of 2 x PNR registers? if so, then perhaps an assert would be better)

https://github.com/llvm/llvm-project/pull/216303