[llvm] [RISCV] Add SDNPCommutative to riscv_mulhr/riscv_mulhru/riscv_mulq/riscv_mulqr. NFC (PR #217702)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Aug 20 10:17:12 PDT 2026
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/217702
NFC because no isel patterns make use of this property today.
>From 3acbf8ae7f6d616b67074dabefc79adef4fb09a2 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 20 Aug 2026 10:15:02 -0700
Subject: [PATCH] [RISCV] Add SDNPCommutative to
riscv_mulhr/riscv_mulhru/riscv_mulq/riscv_mulqr. NFC
NFC because no isel patterns make use of this property today.
---
llvm/lib/Target/RISCV/RISCVInstrInfoP.td | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
index f09df843e0c40..1fca2f5f46447 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoP.td
@@ -1883,13 +1883,13 @@ def riscv_asub : RVSDNode<"ASUB", SDTIntBinOp>;
def riscv_asubu : RVSDNode<"ASUBU", SDTIntBinOp>;
// MULH/MULHU/MULHSU with rounding.
-def riscv_mulhr : RVSDNode<"MULHR", SDTIntBinOp>;
-def riscv_mulhru : RVSDNode<"MULHRU", SDTIntBinOp>;
+def riscv_mulhr : RVSDNode<"MULHR", SDTIntBinOp, [SDNPCommutative]>;
+def riscv_mulhru : RVSDNode<"MULHRU", SDTIntBinOp, [SDNPCommutative]>;
def riscv_mulhrsu : RVSDNode<"MULHRSU", SDTIntBinOp>;
// "Q-format" multiplication
-def riscv_mulq : RVSDNode<"MULQ", SDTIntBinOp>;
-def riscv_mulqr : RVSDNode<"MULQR", SDTIntBinOp>;
+def riscv_mulq : RVSDNode<"MULQ", SDTIntBinOp, [SDNPCommutative]>;
+def riscv_mulqr : RVSDNode<"MULQR", SDTIntBinOp, [SDNPCommutative]>;
def SDT_RISCVPackedShift : SDTypeProfile<1, 2, [SDTCisVec<0>,
SDTCisSameAs<0, 1>,
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