[llvm] [AMDGPU] Remove redundant register alignment check for _Align1 operands (PR #217645)

[Ketan Roy via llvm-commits]

================
@@ -5392,29 +5392,6 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
     if (!Reg)
       continue;
 
-    // FIXME: Ideally we would have separate instruction definitions with the
----------------
MrRoy09 wrote:

Still on main, it was tripping the verifier while working on #129199 

https://github.com/llvm/llvm-project/pull/217645