[llvm] [CodeGen] Do not retype an already typed vreg in constrainRegAttrs (PR #217410)

[Petar Avramovic via llvm-commits]

petar-avramovic wrote:

The problem in combine-binop-s64-with-s32-mask.mir is mixing s32 and i32, and not notifying CSE that instruction was changed (iirc replaceRegWith changed instruction, by changing type on some reg, that was already mapped in CSE).

You are trying to change how replaceRegWith which has much larger impact then it looks like here. If you want to chase that need to prepare a couple mir tests to see the impact and effect on replaceRegWith.

If you want to fix combine-binop-s64-with-s32-mask.mir, use don't use LLT::scalar in input, that is what input should look like if it came from print-after-something on amdgpu.


https://github.com/llvm/llvm-project/pull/217410