[llvm] [RISCV] Fold vmand of mask comparisons into a masked comparison (PR #216264)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Aug 17 10:45:42 PDT 2026


topperc wrote:

> > > Only LMUL <= 1 is folded: for larger LMUL the masked comparison's dest
> > > is earlyclobbered into vrnov0 and cannot share v0 with the mask, which
> > > would introduce extra vmv1r.v moves and regress.
> > 
> > 
> > Is that earlyclobber a real restriction required by the ISA?
> 
> Yes I think so:
> 
> https://github.com/llvm/llvm-project/blob/3cc0457eb8f91ec655fbc0910a4852fbb3c0310f/llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td#L2602-L2629

The ISA should be able to support a v0 destination on a masked compare. We can't have the other sources overlap v0 when lmul>1. But that's the general can't read two registers with the same EEW rule which we don't enforce today on any instruction.

https://github.com/llvm/llvm-project/pull/216264


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