[llvm] [CodeGen] Pass the atomic instruction to supportsUnalignedAtomics. NFC (PR #216621)

[Harrison Hao via llvm-commits]

https://github.com/harrisonGPU updated https://github.com/llvm/llvm-project/pull/216621

>From 6530e27657b79bb152a2424c6b8aaa0ddaedace2 Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Mon, 17 Aug 2026 10:36:28 +0800
Subject: [PATCH 1/2] [CodeGen] Pass the atomic instruction to
 supportsUnalignedAtomics

---
 llvm/include/llvm/CodeGen/TargetLowering.h            | 4 +++-
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 ++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index c8aa38afc5dd0..2eb93a440a6f3 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -2302,7 +2302,9 @@ class LLVM_ABI TargetLoweringBase {
   unsigned getMinCmpXchgSizeInBits() const { return MinCmpXchgSizeInBits; }
 
   /// Whether the target supports unaligned atomic operations.
-  bool supportsUnalignedAtomics() const { return SupportsUnalignedAtomics; }
+  virtual bool supportsUnalignedAtomics(const Instruction *I) const {
+    return SupportsUnalignedAtomics;
+  }
 
   /// Whether AtomicExpandPass should automatically insert fences and reduce
   /// ordering for this atomic. This should be true for most architectures with
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index b3e22ff50d4bd..efb30eba6d82e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5369,7 +5369,7 @@ void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
   EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
   EVT MemVT = TLI.getMemValueType(DAG.getDataLayout(), I.getType());
 
-  if (!TLI.supportsUnalignedAtomics() &&
+  if (!TLI.supportsUnalignedAtomics(&I) &&
       I.getAlign().value() < MemVT.getSizeInBits() / 8)
     report_fatal_error("Cannot generate unaligned atomic load");
 
@@ -5406,7 +5406,7 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) {
   EVT MemVT =
       TLI.getMemValueType(DAG.getDataLayout(), I.getValueOperand()->getType());
 
-  if (!TLI.supportsUnalignedAtomics() &&
+  if (!TLI.supportsUnalignedAtomics(&I) &&
       I.getAlign().value() < MemVT.getSizeInBits() / 8)
     report_fatal_error("Cannot generate unaligned atomic store");
 

>From a6b7903fd4a0970a4b577affcb596eda62ec3a02 Mon Sep 17 00:00:00 2001
From: Harrison Hao <tsworld1314 at gmail.com>
Date: Mon, 17 Aug 2026 17:03:42 +0800
Subject: [PATCH 2/2] Update for comments

---
 llvm/include/llvm/CodeGen/TargetLowering.h            | 10 +++++++---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |  6 ++----
 2 files changed, 9 insertions(+), 7 deletions(-)

diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 2eb93a440a6f3..2d2e18774c4f6 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -2301,9 +2301,13 @@ class LLVM_ABI TargetLoweringBase {
   /// require a more complex expansion.
   unsigned getMinCmpXchgSizeInBits() const { return MinCmpXchgSizeInBits; }
 
-  /// Whether the target supports unaligned atomic operations.
-  virtual bool supportsUnalignedAtomics(const Instruction *I) const {
-    return SupportsUnalignedAtomics;
+  /// Return true if the target can lower the atomic instruction \p I when it
+  /// has the given \p Alignment, for an access of \p SizeInBytes bytes. The
+  /// default implementation only allows naturally aligned atomics, unless
+  /// setSupportsUnalignedAtomics(true) was called.
+  virtual bool supportsAtomicAlignment(const Instruction *I, Align Alignment,
+                                       uint64_t SizeInBytes) const {
+    return SupportsUnalignedAtomics || Alignment.value() >= SizeInBytes;
   }
 
   /// Whether AtomicExpandPass should automatically insert fences and reduce
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index efb30eba6d82e..8075dff76a572 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5369,8 +5369,7 @@ void SelectionDAGBuilder::visitAtomicLoad(const LoadInst &I) {
   EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
   EVT MemVT = TLI.getMemValueType(DAG.getDataLayout(), I.getType());
 
-  if (!TLI.supportsUnalignedAtomics(&I) &&
-      I.getAlign().value() < MemVT.getSizeInBits() / 8)
+  if (!TLI.supportsAtomicAlignment(&I, I.getAlign(), MemVT.getSizeInBits() / 8))
     report_fatal_error("Cannot generate unaligned atomic load");
 
   auto Flags = TLI.getLoadMemOperandFlags(I, DAG.getDataLayout(), AC, LibInfo);
@@ -5406,8 +5405,7 @@ void SelectionDAGBuilder::visitAtomicStore(const StoreInst &I) {
   EVT MemVT =
       TLI.getMemValueType(DAG.getDataLayout(), I.getValueOperand()->getType());
 
-  if (!TLI.supportsUnalignedAtomics(&I) &&
-      I.getAlign().value() < MemVT.getSizeInBits() / 8)
+  if (!TLI.supportsAtomicAlignment(&I, I.getAlign(), MemVT.getSizeInBits() / 8))
     report_fatal_error("Cannot generate unaligned atomic store");
 
   auto Flags = TLI.getStoreMemOperandFlags(I, DAG.getDataLayout());