[llvm] [RISCV][GlobalISel] Legalize and select G_PREFETCH (PR #215466)

[Matt Arsenault via llvm-commits]

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@@ -593,6 +595,42 @@ RISCVInstructionSelector::selectAddrRegImm(MachineOperand &Root) const {
            [=](MachineInstrBuilder &MIB) { MIB.addImm(0); }}};
 }
 
+InstructionSelector::ComplexRendererFns
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arsenm wrote:

This is still reinventing how this operation is selected. This should behave identically to the DAG's implementation. This should be a purely mechanical translation 

https://github.com/llvm/llvm-project/pull/215466