[llvm] [AArch64][CodeGen] Fold tbx(splat(0), table, idxs) to tbl(table, idxs) (PR #214146)
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Wed Aug 5 01:07:47 PDT 2026
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --diff_from_common_commit
``````````
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index c5f3c710f..a9091f2ba 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -25069,23 +25069,28 @@ static SDValue performIntrinsicCombine(SDNode *N,
switch (IID) {
default:
break;
- case Intrinsic::aarch64_neon_tbx1:
+ case Intrinsic::aarch64_neon_tbx1:
case Intrinsic::aarch64_neon_tbx2:
case Intrinsic::aarch64_neon_tbx3:
case Intrinsic::aarch64_neon_tbx4: {
if (ISD::isBuildVectorAllZeros(N->getOperand(1).getNode())) {
unsigned TblIID = 0;
- if (IID == Intrinsic::aarch64_neon_tbx1) TblIID = Intrinsic::aarch64_neon_tbl1;
- else if (IID == Intrinsic::aarch64_neon_tbx2) TblIID = Intrinsic::aarch64_neon_tbl2;
- else if (IID == Intrinsic::aarch64_neon_tbx3) TblIID = Intrinsic::aarch64_neon_tbl3;
- else if (IID == Intrinsic::aarch64_neon_tbx4) TblIID = Intrinsic::aarch64_neon_tbl4;
+ if (IID == Intrinsic::aarch64_neon_tbx1)
+ TblIID = Intrinsic::aarch64_neon_tbl1;
+ else if (IID == Intrinsic::aarch64_neon_tbx2)
+ TblIID = Intrinsic::aarch64_neon_tbl2;
+ else if (IID == Intrinsic::aarch64_neon_tbx3)
+ TblIID = Intrinsic::aarch64_neon_tbl3;
+ else if (IID == Intrinsic::aarch64_neon_tbx4)
+ TblIID = Intrinsic::aarch64_neon_tbl4;
SmallVector<SDValue, 4> Ops;
Ops.push_back(DAG.getTargetConstant(TblIID, SDLoc(N), MVT::i32));
for (unsigned i = 2; i < N->getNumOperands(); ++i)
Ops.push_back(N->getOperand(i));
- return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), N->getValueType(0), Ops);
+ return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, SDLoc(N), N->getValueType(0),
+ Ops);
}
break;
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/214146
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