[llvm] [AArch64][DAG] Widen small types for Min/Max opertations (PR #212966)

[Eli Friedman via llvm-commits]

efriedma-quic wrote:

> I gave this a go and it does improve CodeGen, but still keeps a usshl pattern for v2i8 which I was trying to eradicate completely.

Right, you'd need some additional combines to remove the ushll after legalization... but we don't need to do everything at once.

> is it documented that SDAG does not typically widen? 

The type legalizer is controlled by getPreferredVectorAction().  We could possibly change AArch64TargetLowering::getPreferredVectorAction, but that would affect a lot of code.

https://github.com/llvm/llvm-project/pull/212966