[llvm] [RISCV] Reduce spill/reload pairs when Xqcilo extension is enabled (PR #212807)

[Garvit Gupta via llvm-commits]

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@@ -615,6 +640,18 @@ bool RISCVRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
       // instruction will add 4 to the immediate. If that would overflow 12
       // bits, we can't fold the offset.
       MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+    } else if (!isInt<12>(Val) && ST.hasVendorXqcilo() &&
+               getXqciloWideOpcode(Opc)) {
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quic-garvgupt wrote:

yes, the existing `bare_fi_high_frame` and `bare_fi_high_frame_store` test in llvm/test/CodeGen/RISCV/xqcilo-xqcilia-frame-index.ll file covers this case where opcode promotion happens in the prologe epilogue

https://github.com/llvm/llvm-project/pull/212807