[llvm] [GlobalISel][AArch64] Optimize shl, lshr, ashr (PR #213576)

[Yeongu Choe via llvm-commits]

YeonguChoe wrote:

> Hi. I was looking at getting shifts to legalize differently recently (to not extend the shift type early in the pipeline). Can you remind me what you are aiming to achieve by making i8/i16 legal?

i8 and i16 scalar operations are having additional masking in your test suite. This PR is about fixing that problem.

https://github.com/llvm/llvm-project/pull/213576