[llvm] eeb1e68 - [AArch64][GlobalISel] Update a number of select tests to concrete types. NFC (#213454)
via llvm-commits
llvm-commits at lists.llvm.org
Sat Aug 1 08:03:58 PDT 2026
Author: David Green
Date: 2026-08-01T16:03:53+01:00
New Revision: eeb1e687b28c0f64f36e9b59f88b2afa0aa58fba
URL: https://github.com/llvm/llvm-project/commit/eeb1e687b28c0f64f36e9b59f88b2afa0aa58fba
DIFF: https://github.com/llvm/llvm-project/commit/eeb1e687b28c0f64f36e9b59f88b2afa0aa58fba.diff
LOG: [AArch64][GlobalISel] Update a number of select tests to concrete types. NFC (#213454)
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir
llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
llvm/test/CodeGen/AArch64/GlobalISel/indexed-store-memsize.mir
llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir
llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir
llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
llvm/test/CodeGen/AArch64/GlobalISel/select.mir
llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir
llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir b/llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir
index 1562cd5384961..744b2b96be625 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/contract-store.mir
@@ -13,11 +13,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
- ; CHECK-NEXT: STRXui [[COPY1]], [[COPY]], 0 :: (store (s64))
+ ; CHECK-NEXT: STRXui [[COPY1]], [[COPY]], 0 :: (store (i64))
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
- %2:fpr(s64) = COPY %1
- G_STORE %2:fpr(s64), %0 :: (store (s64))
+ %1:gpr(i64) = COPY $x1
+ %2:fpr(i64) = COPY %1
+ G_STORE %2:fpr(i64), %0 :: (store (i64))
...
---
name: contract_s32_gpr
@@ -31,11 +31,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
- ; CHECK-NEXT: STRWui [[COPY1]], [[COPY]], 0 :: (store (s32))
+ ; CHECK-NEXT: STRWui [[COPY1]], [[COPY]], 0 :: (store (i32))
%0:gpr(p0) = COPY $x0
- %1:gpr(s32) = COPY $w1
- %2:fpr(s32) = COPY %1
- G_STORE %2:fpr(s32), %0 :: (store (s32))
+ %1:gpr(i32) = COPY $w1
+ %2:fpr(i32) = COPY %1
+ G_STORE %2:fpr(i32), %0 :: (store (i32))
...
---
name: contract_s64_fpr
@@ -49,11 +49,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY $d1
- ; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (s64))
+ ; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (i64))
%0:gpr(p0) = COPY $x0
- %1:fpr(s64) = COPY $d1
- %2:gpr(s64) = COPY %1
- G_STORE %2:gpr(s64), %0 :: (store (s64))
+ %1:fpr(i64) = COPY $d1
+ %2:gpr(i64) = COPY %1
+ G_STORE %2:gpr(i64), %0 :: (store (i64))
...
---
name: contract_s32_fpr
@@ -67,11 +67,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
- ; CHECK-NEXT: STRSui [[COPY1]], [[COPY]], 0 :: (store (s32))
+ ; CHECK-NEXT: STRSui [[COPY1]], [[COPY]], 0 :: (store (i32))
%0:gpr(p0) = COPY $x0
- %1:fpr(s32) = COPY $s1
- %2:gpr(s32) = COPY %1
- G_STORE %2:gpr(s32), %0 :: (store (s32))
+ %1:fpr(i32) = COPY $s1
+ %2:gpr(i32) = COPY %1
+ G_STORE %2:gpr(i32), %0 :: (store (i32))
...
---
name: contract_s16_fpr
@@ -85,11 +85,11 @@ body: |
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr16 = COPY $h1
- ; CHECK-NEXT: STRHui [[COPY1]], [[COPY]], 0 :: (store (s16))
+ ; CHECK-NEXT: STRHui [[COPY1]], [[COPY]], 0 :: (store (i16))
%0:gpr(p0) = COPY $x0
- %1:fpr(s16) = COPY $h1
- %2:gpr(s16) = COPY %1
- G_STORE %2:gpr(s16), %0 :: (store (s16))
+ %1:fpr(i16) = COPY $h1
+ %2:gpr(i16) = COPY %1
+ G_STORE %2:gpr(i16), %0 :: (store (i16))
...
---
name: contract_g_unmerge_values_first
@@ -102,16 +102,16 @@ body: |
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
- ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (dereferenceable load (<2 x s64>))
+ ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (dereferenceable load (<2 x i64>))
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY [[LDRQui]].dsub
; CHECK-NEXT: [[DUPi64_:%[0-9]+]]:fpr64 = DUPi64 [[LDRQui]], 1
- ; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (s64))
+ ; CHECK-NEXT: STRDui [[COPY1]], [[COPY]], 0 :: (store (i64))
%0:gpr(p0) = COPY $x0
- %1:fpr(<2 x s64>) = G_LOAD %0:gpr(p0) :: (dereferenceable load (<2 x s64>))
- %2:fpr(s64), %3:fpr(s64) = G_UNMERGE_VALUES %1:fpr(<2 x s64>)
- %4:gpr(s64) = COPY %2
- %5:gpr(s64) = COPY %3
- G_STORE %4:gpr(s64), %0 :: (store (s64))
+ %1:fpr(<2 x i64>) = G_LOAD %0:gpr(p0) :: (dereferenceable load (<2 x i64>))
+ %2:fpr(i64), %3:fpr(i64) = G_UNMERGE_VALUES %1:fpr(<2 x i64>)
+ %4:gpr(i64) = COPY %2
+ %5:gpr(i64) = COPY %3
+ G_STORE %4:gpr(i64), %0 :: (store (i64))
...
---
name: contract_g_unmerge_values_second
@@ -124,16 +124,16 @@ body: |
; CHECK: liveins: $x0, $x1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
- ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (dereferenceable load (<2 x s64>))
+ ; CHECK-NEXT: [[LDRQui:%[0-9]+]]:fpr128 = LDRQui [[COPY]], 0 :: (dereferenceable load (<2 x i64>))
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr64 = COPY [[LDRQui]].dsub
; CHECK-NEXT: [[DUPi64_:%[0-9]+]]:fpr64 = DUPi64 [[LDRQui]], 1
- ; CHECK-NEXT: STRDui [[DUPi64_]], [[COPY]], 0 :: (store (s64))
+ ; CHECK-NEXT: STRDui [[DUPi64_]], [[COPY]], 0 :: (store (i64))
%0:gpr(p0) = COPY $x0
- %1:fpr(<2 x s64>) = G_LOAD %0:gpr(p0) :: (dereferenceable load (<2 x s64>))
- %2:fpr(s64), %3:fpr(s64) = G_UNMERGE_VALUES %1:fpr(<2 x s64>)
- %4:gpr(s64) = COPY %2
- %5:gpr(s64) = COPY %3
- G_STORE %5:gpr(s64), %0 :: (store (s64))
+ %1:fpr(<2 x i64>) = G_LOAD %0:gpr(p0) :: (dereferenceable load (<2 x i64>))
+ %2:fpr(i64), %3:fpr(i64) = G_UNMERGE_VALUES %1:fpr(<2 x i64>)
+ %4:gpr(i64) = COPY %2
+ %5:gpr(i64) = COPY %3
+ G_STORE %5:gpr(i64), %0 :: (store (i64))
...
---
name: contract_s16_truncstore
@@ -148,9 +148,9 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $s1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
- ; CHECK-NEXT: STRHui [[COPY2]], [[COPY]], 0 :: (store (s16))
+ ; CHECK-NEXT: STRHui [[COPY2]], [[COPY]], 0 :: (store (i16))
%0:gpr(p0) = COPY $x0
- %1:fpr(s32) = COPY $s1
- %2:gpr(s32) = COPY %1
- G_STORE %2:gpr(s32), %0 :: (store (s16))
+ %1:fpr(i32) = COPY $s1
+ %2:gpr(i32) = COPY %1
+ G_STORE %2:gpr(i32), %0 :: (store (i16))
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
index ba9227b671528..15fbfffd050c5 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/fold-brcond-fcmp.mir
@@ -35,9 +35,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(oeq), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(oeq), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -76,9 +76,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ogt), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ogt), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -117,9 +117,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(oge), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(oge), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -158,9 +158,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(olt), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(olt), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -199,9 +199,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ole), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ole), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -241,9 +241,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(one), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(one), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -282,9 +282,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ord), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ord), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -323,9 +323,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(uno), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(uno), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -365,9 +365,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ueq), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ueq), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -406,9 +406,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ugt), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ugt), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -447,9 +447,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(uge), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(uge), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -488,9 +488,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ult), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ult), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -529,9 +529,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(ule), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(ule), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
@@ -570,9 +570,9 @@ body: |
successors: %bb.1(0x50000000), %bb.2(0x30000000)
liveins: $s0, $s1, $w0, $w1
- %cmp_lhs:fpr(s32) = COPY $s0
- %cmp_rhs:fpr(s32) = COPY $s1
- %fcmp:gpr(s32) = G_FCMP floatpred(une), %cmp_lhs(s32), %cmp_rhs
+ %cmp_lhs:fpr(f32) = COPY $s0
+ %cmp_rhs:fpr(f32) = COPY $s1
+ %fcmp:gpr(i32) = G_FCMP floatpred(une), %cmp_lhs(f32), %cmp_rhs
G_BRCOND %fcmp, %bb.2
G_BR %bb.1
bb.1:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir b/llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
index 147d0ab392ff2..4c50a80c72ccd 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
@@ -27,12 +27,12 @@ body: |
; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY1]], 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:gpr(s32) = COPY $w0
- %1:gpr(s32) = COPY $w1
- %2:gpr(s32) = G_CONSTANT i32 0
- %5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
- %4:gpr(s32) = G_SELECT %5, %2, %1
- $w0 = COPY %4(s32)
+ %0:gpr(i32) = COPY $w0
+ %1:gpr(i32) = COPY $w1
+ %2:gpr(i32) = G_CONSTANT i32 0
+ %5:gpr(i32) = G_ICMP intpred(eq), %0(i32), %2
+ %4:gpr(i32) = G_SELECT %5, %2, %1
+ $w0 = COPY %4(i32)
RET_ReallyLR implicit $w0
...
@@ -56,13 +56,13 @@ body: |
; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[COPY2]], [[COPY]], 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY [[CSELWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %1:gpr(s32) = COPY $w1
- %2:fpr(s32) = COPY $s0
- %3:fpr(s32) = G_FCONSTANT float 0.000000e+00
- %6:gpr(s32) = G_CONSTANT i32 0
- %7:gpr(s32) = G_FCMP floatpred(oeq), %2(s32), %3
- %5:gpr(s32) = G_SELECT %7, %6, %1
- $w0 = COPY %5(s32)
+ %1:gpr(i32) = COPY $w1
+ %2:fpr(f32) = COPY $s0
+ %3:fpr(f32) = G_FCONSTANT float 0.000000e+00
+ %6:gpr(i32) = G_CONSTANT i32 0
+ %7:gpr(i32) = G_FCMP floatpred(oeq), %2(f32), %3
+ %5:gpr(i32) = G_SELECT %7, %6, %1
+ $w0 = COPY %5(i32)
RET_ReallyLR implicit $w0
...
@@ -84,11 +84,11 @@ body: |
; CHECK-NEXT: [[CSINCWr:%[0-9]+]]:gpr32 = CSINCWr [[COPY]], $wzr, 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY [[CSINCWr]]
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %0:gpr(s32) = COPY $w0
- %1:gpr(s32) = COPY $w1
- %2:gpr(s32) = G_CONSTANT i32 1
- %5:gpr(s32) = G_ICMP intpred(eq), %0(s32), %2
- %4:gpr(s32) = G_SELECT %5, %0, %2
- $w0 = COPY %4(s32)
+ %0:gpr(i32) = COPY $w0
+ %1:gpr(i32) = COPY $w1
+ %2:gpr(i32) = G_CONSTANT i32 1
+ %5:gpr(i32) = G_ICMP intpred(eq), %0(i32), %2
+ %4:gpr(i32) = G_SELECT %5, %0, %2
+ $w0 = COPY %4(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir b/llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
index 2771cead06da4..98136d8db3375 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/fp16-copy-gpr.mir
@@ -58,16 +58,16 @@ body: |
; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: STRWui [[BFMWri1]], [[COPY4]], 0 :: (store (s32) into %ir.addr, align 2)
; CHECK-NEXT: RET_ReallyLR
- %1:fpr(s16) = COPY $h0
- %2:fpr(s16) = COPY $h1
- %3:gpr(s32) = G_IMPLICIT_DEF
- %11:gpr(s16) = COPY %1(s16)
- %4:gpr(s32) = G_INSERT %3, %11(s16), 0
- %12:gpr(s16) = COPY %2(s16)
- %5:gpr(s32) = G_INSERT %4, %12(s16), 16
- %0:gpr(s32) = COPY %5(s32)
+ %1:fpr(f16) = COPY $h0
+ %2:fpr(f16) = COPY $h1
+ %3:gpr(f32) = G_IMPLICIT_DEF
+ %11:gpr(f16) = COPY %1(f16)
+ %4:gpr(f32) = G_INSERT %3, %11(f16), 0
+ %12:gpr(f16) = COPY %2(f16)
+ %5:gpr(f32) = G_INSERT %4, %12(f16), 16
+ %0:gpr(f32) = COPY %5(f32)
%6:gpr(p0) = COPY $x0
- G_STORE %0(s32), %6(p0) :: (store (s32) into %ir.addr, align 2)
+ G_STORE %0(f32), %6(p0) :: (store (s32) into %ir.addr, align 2)
RET_ReallyLR
...
@@ -94,10 +94,10 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
; CHECK-NEXT: $h0 = COPY [[COPY2]]
; CHECK-NEXT: RET_ReallyLR implicit $h0
- %0:gpr(s32) = COPY $w0
- %1:gpr(s16) = G_TRUNC %0(s32)
- %2:fpr(s16) = COPY %1(s16)
- $h0 = COPY %2(s16)
+ %0:gpr(i32) = COPY $w0
+ %1:gpr(i16) = G_TRUNC %0(i32)
+ %2:fpr(i16) = COPY %1(i16)
+ $h0 = COPY %2(i16)
RET_ReallyLR implicit $h0
...
@@ -122,9 +122,9 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
; CHECK-NEXT: $h0 = COPY [[COPY2]]
; CHECK-NEXT: RET_ReallyLR implicit $h0
- %0:gpr(s32) = COPY $w0
- %1:gpr(s16) = G_TRUNC %0(s32)
- $h0 = COPY %1(s16)
+ %0:gpr(i32) = COPY $w0
+ %1:gpr(i16) = G_TRUNC %0(i32)
+ $h0 = COPY %1(i16)
RET_ReallyLR implicit $h0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/indexed-store-memsize.mir b/llvm/test/CodeGen/AArch64/GlobalISel/indexed-store-memsize.mir
index 7e0c64425d879..d63daa20c0cb6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/indexed-store-memsize.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/indexed-store-memsize.mir
@@ -19,9 +19,9 @@ body: |
; CHECK-NEXT: $x0 = COPY %wb
; CHECK-NEXT: RET_ReallyLR
%ptr:gpr(p0) = COPY $x0
- %val32:gpr(s32) = COPY $w1
+ %val32:gpr(i32) = COPY $w1
%off:gpr(s64) = G_CONSTANT i64 2
- %wb:gpr(p0) = G_INDEXED_STORE %val32(s32), %ptr, %off, 1 :: (store (s16))
+ %wb:gpr(p0) = G_INDEXED_STORE %val32(i32), %ptr, %off, 1 :: (store (s16))
$x0 = COPY %wb
RET_ReallyLR
@@ -44,9 +44,9 @@ body: |
; CHECK-NEXT: $x0 = COPY %wb
; CHECK-NEXT: RET_ReallyLR
%ptr:gpr(p0) = COPY $x0
- %val32:gpr(s32) = COPY $w1
+ %val32:gpr(i32) = COPY $w1
%off:gpr(s64) = G_CONSTANT i64 2
- %wb:gpr(p0) = G_INDEXED_STORE %val32(s32), %ptr, %off, 0 :: (store (s16))
+ %wb:gpr(p0) = G_INDEXED_STORE %val32(i32), %ptr, %off, 0 :: (store (s16))
$x0 = COPY %wb
RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir b/llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
index e3cea0dd5b033..65787cb431c40 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/load-wro-addressing-modes.mir
@@ -32,8 +32,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 2
%offset:gpr(i64) = G_SHL %ext, %c
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -67,8 +67,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 2
%offset:gpr(i64) = G_SHL %ext, %c
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -102,8 +102,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 2
%offset:gpr(i64) = G_SHL %ext, %c
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -135,8 +135,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 4
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -168,8 +168,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 4
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -201,8 +201,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 4
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s32))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s32))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -234,8 +234,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 8
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:fpr(<2 x s32>) = G_LOAD %ptr(p0) :: (load (<2 x s32>))
- $x0 = COPY %load(<2 x s32>)
+ %load:fpr(<2 x i32>) = G_LOAD %ptr(p0) :: (load (<2 x s32>))
+ $x0 = COPY %load(<2 x i32>)
RET_ReallyLR implicit $x0
...
---
@@ -267,8 +267,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 8
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:gpr(s64) = G_LOAD %ptr(p0) :: (load (s64))
- $x0 = COPY %load(s64)
+ %load:gpr(i64) = G_LOAD %ptr(p0) :: (load (s64))
+ $x0 = COPY %load(i64)
RET_ReallyLR implicit $x0
...
---
@@ -299,8 +299,8 @@ body: |
%base:gpr(p0) = COPY $x0
%ext:gpr(i64) = G_SEXT %val(i32)
%ptr:gpr(p0) = G_PTR_ADD %base, %ext(i64)
- %load:gpr(s32) = G_LOAD %ptr(p0) :: (load (s8))
- $w0 = COPY %load(s32)
+ %load:gpr(i32) = G_LOAD %ptr(p0) :: (load (s8))
+ $w0 = COPY %load(i32)
RET_ReallyLR implicit $w0
...
---
@@ -332,8 +332,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 2
%offset:gpr(i64) = G_MUL %c, %ext
%ptr:gpr(p0) = G_PTR_ADD %base, %offset(i64)
- %load:fpr(s16) = G_LOAD %ptr(p0) :: (load (s16))
- $h0 = COPY %load(s16)
+ %load:fpr(f16) = G_LOAD %ptr(p0) :: (load (s16))
+ $h0 = COPY %load(f16)
RET_ReallyLR implicit $h0
...
---
@@ -367,8 +367,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 8
%mul:gpr(i64) = G_MUL %c, %and
%ptr:gpr(p0) = G_PTR_ADD %base, %mul(i64)
- %load:gpr(s64) = G_LOAD %ptr(p0) :: (load (s64))
- $x1 = COPY %load(s64)
+ %load:gpr(i64) = G_LOAD %ptr(p0) :: (load (s64))
+ $x1 = COPY %load(i64)
RET_ReallyLR implicit $x1
...
---
@@ -402,8 +402,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 8
%mul:gpr(i64) = G_MUL %c, %and
%ptr:gpr(p0) = G_PTR_ADD %base, %mul(i64)
- %load:gpr(s64) = G_LOAD %ptr(p0) :: (load (s64))
- $x1 = COPY %load(s64)
+ %load:gpr(i64) = G_LOAD %ptr(p0) :: (load (s64))
+ $x1 = COPY %load(i64)
RET_ReallyLR implicit $x1
...
---
@@ -437,8 +437,8 @@ body: |
%c:gpr(i64) = G_CONSTANT i64 8
%mul:gpr(i64) = G_MUL %c, %and
%ptr:gpr(p0) = G_PTR_ADD %base, %mul(i64)
- %load:gpr(s64) = G_LOAD %ptr(p0) :: (load (s64))
- $x1 = COPY %load(s64)
+ %load:gpr(i64) = G_LOAD %ptr(p0) :: (load (s64))
+ $x1 = COPY %load(i64)
RET_ReallyLR implicit $x1
...
---
@@ -473,8 +473,8 @@ body: |
%12:gpr(i32) = G_SHL %3, %13(i64)
%6:gpr(i64) = G_ZEXT %12(i32)
%7:gpr(p0) = G_PTR_ADD %1, %6(i64)
- %9:gpr(s32) = G_LOAD %7(p0) :: (load (s32))
- $w0 = COPY %9(s32)
+ %9:gpr(i32) = G_LOAD %7(p0) :: (load (s32))
+ $w0 = COPY %9(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir b/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
index 9283adfaf20df..5f8b14f00d77b 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
@@ -25,12 +25,12 @@ body: |
bb.0:
successors: %bb.0, %bb.1
liveins: $x0
- %copy:gpr(s32) = COPY $w0
- %bit:gpr(s64) = G_CONSTANT i64 8
- %zero:gpr(s64) = G_CONSTANT i64 0
- %fold_me:gpr(s64) = G_ZEXT %copy(s32)
- %and:gpr(s64) = G_AND %fold_me, %bit
- %cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
+ %copy:gpr(i32) = COPY $w0
+ %bit:gpr(i64) = G_CONSTANT i64 8
+ %zero:gpr(i64) = G_CONSTANT i64 0
+ %fold_me:gpr(i64) = G_ZEXT %copy(i32)
+ %and:gpr(i64) = G_AND %fold_me, %bit
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
@@ -57,12 +57,12 @@ body: |
bb.0:
successors: %bb.0, %bb.1
liveins: $x0
- %copy:gpr(s32) = COPY $w0
- %bit:gpr(s64) = G_CONSTANT i64 8
- %zero:gpr(s64) = G_CONSTANT i64 0
- %fold_me:gpr(s64) = G_ANYEXT %copy(s32)
- %and:gpr(s64) = G_AND %fold_me, %bit
- %cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
+ %copy:gpr(i32) = COPY $w0
+ %bit:gpr(i64) = G_CONSTANT i64 8
+ %zero:gpr(i64) = G_CONSTANT i64 0
+ %fold_me:gpr(i64) = G_ANYEXT %copy(i32)
+ %and:gpr(i64) = G_AND %fold_me, %bit
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
@@ -92,12 +92,12 @@ body: |
successors: %bb.0, %bb.1
liveins: $h0
%copy:gpr(s16) = COPY $h0
- %bit:gpr(s64) = G_CONSTANT i64 8
- %zero:gpr(s64) = G_CONSTANT i64 0
- %ext1:gpr(s32) = G_ZEXT %copy(s16)
- %ext2:gpr(s64) = G_ANYEXT %ext1(s32)
- %and:gpr(s64) = G_AND %ext2, %bit
- %cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
+ %bit:gpr(i64) = G_CONSTANT i64 8
+ %zero:gpr(i64) = G_CONSTANT i64 0
+ %ext1:gpr(i32) = G_ZEXT %copy(s16)
+ %ext2:gpr(i64) = G_ANYEXT %ext1(i32)
+ %and:gpr(i64) = G_AND %ext2, %bit
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
@@ -129,14 +129,14 @@ body: |
bb.0:
successors: %bb.0, %bb.1
liveins: $x0
- %copy:gpr(s32) = COPY $w0
- %bit:gpr(s64) = G_CONSTANT i64 8
- %zero:gpr(s64) = G_CONSTANT i64 0
- %zext:gpr(s64) = G_ZEXT %copy(s32)
- %and:gpr(s64) = G_AND %zext, %bit
- %cmp:gpr(s32) = G_ICMP intpred(ne), %and(s64), %zero
+ %copy:gpr(i32) = COPY $w0
+ %bit:gpr(i64) = G_CONSTANT i64 8
+ %zero:gpr(i64) = G_CONSTANT i64 0
+ %zext:gpr(i64) = G_ZEXT %copy(i32)
+ %and:gpr(i64) = G_AND %zext, %bit
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %and(i64), %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
- $x0 = COPY %zext:gpr(s64)
+ $x0 = COPY %zext:gpr(i64)
RET_ReallyLR implicit $x0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir b/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir
index f50f3bb78e6b8..b943a8e0bc297 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-trunc-tbz-tbnz.mir
@@ -24,12 +24,12 @@ body: |
bb.0:
successors: %bb.0, %bb.1
liveins: $x0
- %copy:gpr(s64) = COPY $x0
- %bit:gpr(s32) = G_CONSTANT i32 8
- %zero:gpr(s32) = G_CONSTANT i32 0
- %fold_me:gpr(s32) = G_TRUNC %copy(s64)
- %and:gpr(s32) = G_AND %fold_me, %bit
- %cmp:gpr(s32) = G_ICMP intpred(ne), %and(s32), %zero
+ %copy:gpr(i64) = COPY $x0
+ %bit:gpr(i32) = G_CONSTANT i32 8
+ %zero:gpr(i32) = G_CONSTANT i32 0
+ %fold_me:gpr(i32) = G_TRUNC %copy(i64)
+ %and:gpr(i32) = G_AND %fold_me, %bit
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %and(i32), %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir b/llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir
index 28ecffb38fc8e..626f0663c9d49 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir
@@ -28,12 +28,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(eq), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(eq), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -55,12 +55,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(eq), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(eq), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -82,12 +82,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 1, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(eq), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(eq), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -109,12 +109,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ne), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -136,12 +136,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ne), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -163,12 +163,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ne), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ne), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -190,12 +190,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ult), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ult), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -216,12 +216,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ult), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ult), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -242,12 +242,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 2, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ult), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ult), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -268,12 +268,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ugt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ugt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -294,12 +294,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ugt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ugt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -320,12 +320,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 9, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ugt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ugt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -348,12 +348,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(uge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(uge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -374,12 +374,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(uge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(uge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -400,12 +400,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 3, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(uge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(uge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -428,12 +428,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ule), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ule), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -454,12 +454,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ule), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ule), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -480,12 +480,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 8, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(ule), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(ule), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
...
@@ -507,12 +507,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(slt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(slt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -533,12 +533,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(slt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(slt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -559,12 +559,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 10, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(slt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(slt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -585,12 +585,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sgt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sgt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -611,12 +611,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sgt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sgt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -637,12 +637,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 13, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sgt), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sgt), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -663,12 +663,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -689,12 +689,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -715,12 +715,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 11, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sge), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sge), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
@@ -743,12 +743,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_SHL %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sle), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_SHL %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sle), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -769,12 +769,12 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_ASHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sle), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_ASHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sle), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
---
@@ -795,11 +795,11 @@ body: |
; CHECK-NEXT: %cmp:gpr32 = CSINCWr $wzr, $wzr, 12, implicit $nzcv
; CHECK-NEXT: $w0 = COPY %cmp
; CHECK-NEXT: RET_ReallyLR implicit $w0
- %copy0:gpr(s32) = COPY $w0
- %copy1:gpr(s32) = COPY $w1
- %three:gpr(s32) = G_CONSTANT i32 3
- %shift:gpr(s32) = G_LSHR %copy0, %three(s32)
- %cmp:gpr(s32) = G_ICMP intpred(sle), %copy1(s32), %shift
- $w0 = COPY %cmp(s32)
+ %copy0:gpr(i32) = COPY $w0
+ %copy1:gpr(i32) = COPY $w1
+ %three:gpr(i32) = G_CONSTANT i32 3
+ %shift:gpr(i32) = G_LSHR %copy0, %three(i32)
+ %cmp:gpr(i32) = G_ICMP intpred(sle), %copy1(i32), %shift
+ $w0 = COPY %cmp(i32)
RET_ReallyLR implicit $w0
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir b/llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
index b36c25baabb63..5aa77f1e1295f 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -verify-machineinstrs -mtriple aarch64--- --run-pass=instruction-select -global-isel-abort=1 %s -o - | FileCheck %s
+# RUN: llc -verify-machineinstrs -mtriple aarch64-- --run-pass=instruction-select -global-isel-abort=1 %s -o - | FileCheck %s
---
name: test_loop_phi_fpr_to_gpr
@@ -31,32 +31,32 @@ body: |
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[CSELWr]], %bb.1, %8, %bb.2
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[CSELWr]], %bb.1, %7, %bb.2
; CHECK-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr [[COPY]], implicit $fpcr
- ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr32 = SUBREG_TO_REG [[FCVTHSr]], %subreg.hsub
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[SUBREG_TO_REG]]
- ; CHECK-NEXT: STRHHui [[PHI]], [[DEF1]], 0 :: (store (s16) into `ptr undef`)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[FCVTHSr]]
+ ; CHECK-NEXT: STRHHui [[PHI]], [[DEF1]], 0 :: (store (i16) into `ptr undef`)
; CHECK-NEXT: B %bb.2
bb.0:
successors: %bb.1(0x80000000)
- %0:gpr(s32) = G_IMPLICIT_DEF
+ %0:gpr(i32) = G_IMPLICIT_DEF
%4:gpr(p0) = G_IMPLICIT_DEF
%8:fpr(f32) = G_FCONSTANT float 0x7FF8000000000000
bb.1:
successors: %bb.2(0x80000000)
- %6:gpr(s32) = G_IMPLICIT_DEF
- %7:gpr(s32) = G_SELECT %0(s32), %6, %6
- %1:gpr(s16) = G_TRUNC %7(s32)
+ %6:gpr(i32) = G_IMPLICIT_DEF
+ %7:gpr(i32) = G_SELECT %0(i32), %6, %6
+ %1:gpr(i16) = G_TRUNC %7(i32)
bb.2:
successors: %bb.2(0x80000000)
- %3:gpr(s16) = G_PHI %1(s16), %bb.1, %5(s16), %bb.2
+ %3:gpr(i16) = G_PHI %1(i16), %bb.1, %9(i16), %bb.2
%5:fpr(f16) = G_FPTRUNC %8(f32)
- G_STORE %3(s16), %4(p0) :: (store (s16) into `ptr undef`)
+ %9:gpr(i16) = G_BITCAST %5(f16)
+ G_STORE %3(i16), %4(p0) :: (store (i16) into `ptr undef`)
G_BR %bb.2
...
@@ -86,36 +86,36 @@ body: |
; CHECK-NEXT: [[DEF2:%[0-9]+]]:gpr32 = IMPLICIT_DEF
; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32 = ANDSWri [[DEF]], 0, implicit-def $nzcv
; CHECK-NEXT: [[CSELWr:%[0-9]+]]:gpr32 = CSELWr [[DEF2]], [[DEF2]], 1, implicit $nzcv
- ; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY [[CSELWr]]
- ; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY [[COPY1]].hsub
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.2(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr16 = PHI %7, %bb.2, [[COPY2]], %bb.1
+ ; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr16 = PHI %7, %bb.2, [[CSELWr]], %bb.1
; CHECK-NEXT: [[FCVTHSr:%[0-9]+]]:fpr16 = nofpexcept FCVTHSr [[COPY]], implicit $fpcr
- ; CHECK-NEXT: STRHui [[PHI]], [[DEF1]], 0 :: (store (s16) into `ptr undef`)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY [[FCVTHSr]]
+ ; CHECK-NEXT: STRHui [[PHI]], [[DEF1]], 0 :: (store (i16) into `ptr undef`)
; CHECK-NEXT: B %bb.2
bb.0:
successors: %bb.1(0x80000000)
- %0:gpr(s32) = G_IMPLICIT_DEF
+ %0:gpr(i32) = G_IMPLICIT_DEF
%4:gpr(p0) = G_IMPLICIT_DEF
%8:fpr(f32) = G_FCONSTANT float 0x7FF8000000000000
bb.1:
successors: %bb.2(0x80000000)
- %6:gpr(s32) = G_IMPLICIT_DEF
- %7:gpr(s32) = G_SELECT %0(s32), %6, %6
- %1:gpr(s16) = G_TRUNC %7(s32)
+ %6:gpr(i32) = G_IMPLICIT_DEF
+ %7:gpr(i32) = G_SELECT %0(i32), %6, %6
+ %1:gpr(i16) = G_TRUNC %7(i32)
bb.2:
successors: %bb.2(0x80000000)
- %3:fpr(s16) = G_PHI %5(s16), %bb.2, %1(s16), %bb.1
+ %3:fpr(i16) = G_PHI %9(i16), %bb.2, %1(i16), %bb.1
%5:fpr(f16) = G_FPTRUNC %8(f32)
- G_STORE %3(s16), %4(p0) :: (store (s16) into `ptr undef`)
+ %9:gpr(i16) = G_BITCAST %5(f16)
+ G_STORE %3(i16), %4(p0) :: (store (i16) into `ptr undef`)
G_BR %bb.2
...
@@ -172,10 +172,10 @@ body: |
; CHECK-NEXT: %use_gp_phi1:gpr32 = PHI %gpr_1, %bb.0, %gp_phi1, %bb.4
; CHECK-NEXT: %use_gp_phi2:gpr32 = PHI %gpr_1, %bb.0, %gp_phi2, %bb.4
; CHECK-NEXT: %use_gp_phi3:gpr32 = PHI %gpr_1, %bb.0, %gp_phi3, %bb.4
- ; CHECK-NEXT: STRHHui %use_fp_phi, %ptr, 0 :: (store (s16))
- ; CHECK-NEXT: STRHHui %use_gp_phi1, %ptr, 0 :: (store (s16))
- ; CHECK-NEXT: STRHHui %use_gp_phi2, %ptr, 0 :: (store (s16))
- ; CHECK-NEXT: STRHHui %use_gp_phi3, %ptr, 0 :: (store (s16))
+ ; CHECK-NEXT: STRHHui %use_fp_phi, %ptr, 0 :: (store (i16))
+ ; CHECK-NEXT: STRHHui %use_gp_phi1, %ptr, 0 :: (store (i16))
+ ; CHECK-NEXT: STRHHui %use_gp_phi2, %ptr, 0 :: (store (i16))
+ ; CHECK-NEXT: STRHHui %use_gp_phi3, %ptr, 0 :: (store (i16))
; CHECK-NEXT: RET_ReallyLR
; The copy we insert in bb.4 should appear after all the phi instructions.
@@ -184,33 +184,33 @@ body: |
successors: %bb.2, %bb.6
liveins: $w0, $w1, $x2
%ptr:gpr(p0) = COPY $x2
- %cond_1:gpr(s32) = G_IMPLICIT_DEF
- %gpr_1:gpr(s16) = G_IMPLICIT_DEF
- G_BRCOND %cond_1(s32), %bb.6
+ %cond_1:gpr(i32) = G_IMPLICIT_DEF
+ %gpr_1:gpr(i16) = G_IMPLICIT_DEF
+ G_BRCOND %cond_1(i32), %bb.6
G_BR %bb.2
bb.2:
successors: %bb.3, %bb.4
- %cond_2:gpr(s32) = G_IMPLICIT_DEF
- G_BRCOND %cond_2(s32), %bb.4
+ %cond_2:gpr(i32) = G_IMPLICIT_DEF
+ G_BRCOND %cond_2(i32), %bb.4
G_BR %bb.3
bb.3:
- %gpr_2:gpr(s16) = G_IMPLICIT_DEF
+ %gpr_2:gpr(i16) = G_IMPLICIT_DEF
G_BR %bb.5
bb.4:
- %fpr:fpr(s16) = G_IMPLICIT_DEF
+ %fpr:fpr(i16) = G_IMPLICIT_DEF
bb.5:
- %fp_phi:fpr(s16) = G_PHI %fpr(s16), %bb.4, %gpr_1(s16), %bb.3
- %gp_phi1:gpr(s16) = G_PHI %gpr_1(s16), %bb.4, %gpr_2(s16), %bb.3
- %gp_phi2:gpr(s16) = G_PHI %gpr_1(s16), %bb.4, %gpr_2(s16), %bb.3
- %gp_phi3:gpr(s16) = G_PHI %gpr_1(s16), %bb.4, %gpr_2(s16), %bb.3
+ %fp_phi:fpr(i16) = G_PHI %fpr(i16), %bb.4, %gpr_1(i16), %bb.3
+ %gp_phi1:gpr(i16) = G_PHI %gpr_1(i16), %bb.4, %gpr_2(i16), %bb.3
+ %gp_phi2:gpr(i16) = G_PHI %gpr_1(i16), %bb.4, %gpr_2(i16), %bb.3
+ %gp_phi3:gpr(i16) = G_PHI %gpr_1(i16), %bb.4, %gpr_2(i16), %bb.3
bb.6:
- %use_fp_phi:gpr(s16) = G_PHI %gpr_1(s16), %bb.1, %fp_phi(s16), %bb.5
- %use_gp_phi1:gpr(s16) = G_PHI %gpr_1(s16), %bb.1, %gp_phi1(s16), %bb.5
- %use_gp_phi2:gpr(s16) = G_PHI %gpr_1(s16), %bb.1, %gp_phi2(s16), %bb.5
- %use_gp_phi3:gpr(s16) = G_PHI %gpr_1(s16), %bb.1, %gp_phi3(s16), %bb.5
- G_STORE %use_fp_phi(s16), %ptr(p0) :: (store (s16))
- G_STORE %use_gp_phi1(s16), %ptr(p0) :: (store (s16))
- G_STORE %use_gp_phi2(s16), %ptr(p0) :: (store (s16))
- G_STORE %use_gp_phi3(s16), %ptr(p0) :: (store (s16))
+ %use_fp_phi:gpr(i16) = G_PHI %gpr_1(i16), %bb.1, %fp_phi(i16), %bb.5
+ %use_gp_phi1:gpr(i16) = G_PHI %gpr_1(i16), %bb.1, %gp_phi1(i16), %bb.5
+ %use_gp_phi2:gpr(i16) = G_PHI %gpr_1(i16), %bb.1, %gp_phi2(i16), %bb.5
+ %use_gp_phi3:gpr(i16) = G_PHI %gpr_1(i16), %bb.1, %gp_phi3(i16), %bb.5
+ G_STORE %use_fp_phi(i16), %ptr(p0) :: (store (i16))
+ G_STORE %use_gp_phi1(i16), %ptr(p0) :: (store (i16))
+ G_STORE %use_gp_phi2(i16), %ptr(p0) :: (store (i16))
+ G_STORE %use_gp_phi3(i16), %ptr(p0) :: (store (i16))
RET_ReallyLR
...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/select.mir b/llvm/test/CodeGen/AArch64/GlobalISel/select.mir
index b3613f52c4ec6..a3279537befa0 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/select.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/select.mir
@@ -57,7 +57,7 @@ body: |
; CHECK-NEXT: [[ANDXri:%[0-9]+]]:gpr64sp = ANDXri [[COPY]], 8060
; CHECK-NEXT: $x0 = COPY [[ANDXri]]
%0:gpr(p0) = COPY $x0
- %const:gpr(s64) = G_CONSTANT i64 -8
+ %const:gpr(i64) = G_CONSTANT i64 -8
%1:gpr(p0) = G_PTRMASK %0, %const
$x0 = COPY %1(p0)
...
@@ -119,23 +119,23 @@ body: |
; CHECK-NEXT: [[CSINCWr2:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 0, implicit $nzcv
; CHECK-NEXT: [[COPY5:%[0-9]+]]:gpr32all = COPY [[CSINCWr2]]
; CHECK-NEXT: $w0 = COPY [[COPY5]]
- %0:gpr(s32) = COPY $w0
- %1:gpr(s32) = G_ICMP intpred(eq), %0, %0
- %6:gpr(s8) = G_TRUNC %1(s32)
- %9:gpr(s32) = G_ANYEXT %6
- $w0 = COPY %9(s32)
+ %0:gpr(i32) = COPY $w0
+ %1:gpr(i32) = G_ICMP intpred(eq), %0, %0
+ %6:gpr(i8) = G_TRUNC %1(i32)
+ %9:gpr(i32) = G_ANYEXT %6
+ $w0 = COPY %9(i32)
- %2:gpr(s64) = COPY $x0
- %3:gpr(s32) = G_ICMP intpred(uge), %2, %2
- %7:gpr(s8) = G_TRUNC %3(s32)
- %10:gpr(s32) = G_ANYEXT %7
- $w0 = COPY %10(s32)
+ %2:gpr(i64) = COPY $x0
+ %3:gpr(i32) = G_ICMP intpred(uge), %2, %2
+ %7:gpr(i8) = G_TRUNC %3(i32)
+ %10:gpr(i32) = G_ANYEXT %7
+ $w0 = COPY %10(i32)
%4:gpr(p0) = COPY $x0
- %5:gpr(s32) = G_ICMP intpred(ne), %4, %4
- %8:gpr(s8) = G_TRUNC %5(s32)
- %11:gpr(s32) = G_ANYEXT %8
- $w0 = COPY %11(s32)
+ %5:gpr(i32) = G_ICMP intpred(ne), %4, %4
+ %8:gpr(i8) = G_TRUNC %5(i32)
+ %11:gpr(i32) = G_ANYEXT %8
+ $w0 = COPY %11(i32)
...
---
@@ -171,29 +171,29 @@ body: |
; CHECK-NEXT: [[CSINCWr4:%[0-9]+]]:gpr32 = CSINCWr $wzr, $wzr, 14, implicit $nzcv
; CHECK-NEXT: [[COPY7:%[0-9]+]]:gpr32all = COPY [[CSINCWr4]]
; CHECK-NEXT: $w0 = COPY [[COPY7]]
- %0:fpr(s32) = COPY $s0
- %1:gpr(s32) = G_FCMP floatpred(one), %0, %0
- %2:gpr(s8) = G_TRUNC %1(s32)
- %3:gpr(s32) = G_ANYEXT %2
- $w0 = COPY %3(s32)
+ %0:fpr(f32) = COPY $s0
+ %1:gpr(i32) = G_FCMP floatpred(one), %0, %0
+ %2:gpr(i8) = G_TRUNC %1(i32)
+ %3:gpr(i32) = G_ANYEXT %2
+ $w0 = COPY %3(i32)
- %4:fpr(s64) = COPY $d0
- %5:gpr(s32) = G_FCMP floatpred(uge), %4, %4
- %6:gpr(s8) = G_TRUNC %5(s32)
- %7:gpr(s32) = G_ANYEXT %6
- $w0 = COPY %7(s32)
+ %4:fpr(f64) = COPY $d0
+ %5:gpr(i32) = G_FCMP floatpred(uge), %4, %4
+ %6:gpr(i8) = G_TRUNC %5(i32)
+ %7:gpr(i32) = G_ANYEXT %6
+ $w0 = COPY %7(i32)
- %8:fpr(s32) = COPY $s0
- %9:gpr(s32) = G_FCMP floatpred(true), %8, %8
- %10:gpr(s8) = G_TRUNC %9(s32)
- %11:gpr(s32) = G_ANYEXT %10
- $w0 = COPY %11(s32)
+ %8:fpr(f32) = COPY $s0
+ %9:gpr(i32) = G_FCMP floatpred(true), %8, %8
+ %10:gpr(i8) = G_TRUNC %9(i32)
+ %11:gpr(i32) = G_ANYEXT %10
+ $w0 = COPY %11(i32)
- %12:fpr(s64) = COPY $d0
- %13:gpr(s32) = G_FCMP floatpred(false), %12, %12
- %14:gpr(s8) = G_TRUNC %13(s32)
- %15:gpr(s32) = G_ANYEXT %14
- $w0 = COPY %15(s32)
+ %12:fpr(f64) = COPY $d0
+ %13:gpr(i32) = G_FCMP floatpred(false), %12, %12
+ %14:gpr(i8) = G_TRUNC %13(i32)
+ %15:gpr(i32) = G_ANYEXT %14
+ $w0 = COPY %15(i32)
...
@@ -223,12 +223,12 @@ body: |
bb.0:
liveins: $s0, $w0
successors: %bb.1
- %0:fpr(s32) = COPY $s0
- %3:gpr(s32) = COPY $w0
+ %0:fpr(i32) = COPY $s0
+ %3:gpr(i32) = COPY $w0
bb.1:
successors: %bb.1, %bb.2
- %2:fpr(s32) = PHI %0, %bb.0, %2, %bb.1
+ %2:fpr(i32) = PHI %0, %bb.0, %2, %bb.1
G_BRCOND %3, %bb.1
bb.2:
@@ -263,17 +263,17 @@ body: |
; CHECK-NEXT: [[ANDSWri2:%[0-9]+]]:gpr32 = ANDSWri [[COPY]], 0, implicit-def $nzcv
; CHECK-NEXT: [[CSELXr1:%[0-9]+]]:gpr64 = CSELXr [[COPY5]], [[COPY6]], 1, implicit $nzcv
; CHECK-NEXT: $x0 = COPY [[CSELXr1]]
- %10:gpr(s32) = COPY $w0
+ %10:gpr(i32) = COPY $w0
- %1:gpr(s32) = COPY $w1
- %2:gpr(s32) = COPY $w2
- %3:gpr(s32) = G_SELECT %10, %1, %2
- $w0 = COPY %3(s32)
+ %1:gpr(i32) = COPY $w1
+ %2:gpr(i32) = COPY $w2
+ %3:gpr(i32) = G_SELECT %10, %1, %2
+ $w0 = COPY %3(i32)
- %4:gpr(s64) = COPY $x0
- %5:gpr(s64) = COPY $x1
- %6:gpr(s64) = G_SELECT %10, %4, %5
- $x0 = COPY %6(s64)
+ %4:gpr(i64) = COPY $x0
+ %5:gpr(i64) = COPY $x1
+ %6:gpr(i64) = G_SELECT %10, %4, %5
+ $x0 = COPY %6(i64)
%7:gpr(p0) = COPY $x0
%8:gpr(p0) = COPY $x1
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir b/llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir
index 3de720f34f511..ddf1f55056d38 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/speculative-hardening-brcond.mir
@@ -31,7 +31,7 @@ body: |
bb.0:
liveins: $w0
successors: %bb.0, %bb.1
- %reg:gpr(s32) = COPY $w0
+ %reg:gpr(i32) = COPY $w0
G_BRCOND %reg, %bb.1
G_BR %bb.0
bb.1:
@@ -57,9 +57,9 @@ body: |
bb.0:
liveins: $w0
successors: %bb.0, %bb.1
- %reg:gpr(s32) = COPY $w0
- %zero:gpr(s32) = G_CONSTANT i32 0
- %cmp:gpr(s32) = G_ICMP intpred(eq), %reg, %zero
+ %reg:gpr(i32) = COPY $w0
+ %zero:gpr(i32) = G_CONSTANT i32 0
+ %cmp:gpr(i32) = G_ICMP intpred(eq), %reg, %zero
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
@@ -86,9 +86,9 @@ body: |
bb.0:
liveins: $s0, $s1
successors: %bb.0, %bb.1
- %reg0:fpr(s32) = COPY $s0
- %reg1:fpr(s32) = COPY $s1
- %cmp:gpr(s32) = G_FCMP floatpred(oeq), %reg0, %reg1
+ %reg0:fpr(f32) = COPY $s0
+ %reg1:fpr(f32) = COPY $s1
+ %cmp:gpr(i32) = G_FCMP floatpred(oeq), %reg0, %reg1
G_BRCOND %cmp, %bb.1
G_BR %bb.0
bb.1:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir b/llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
index 94af12a91ae97..fc634f1185f3e 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/store-addressing-modes.mir
@@ -34,12 +34,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
- ; CHECK-NEXT: STRXroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s64) into %ir.addr)
+ ; CHECK-NEXT: STRXroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (i64) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
- %3:gpr(s64) = COPY $x2
- G_STORE %3, %ptr :: (store (s64) into %ir.addr)
+ %3:gpr(i64) = COPY $x2
+ G_STORE %3, %ptr :: (store (i64) into %ir.addr)
...
---
name: strxrox_p0
@@ -60,7 +60,7 @@ body: |
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY [[COPY2]]
; CHECK-NEXT: STRXroX [[COPY3]], [[COPY]], [[COPY1]], 0, 0 :: (store (p0) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
%3:gpr(p0) = COPY $x2
G_STORE %3, %ptr :: (store (p0) into %ir.addr)
@@ -81,12 +81,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY $d2
- ; CHECK-NEXT: STRDroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s64) into %ir.addr)
+ ; CHECK-NEXT: STRDroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (i64) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
- %3:fpr(s64) = COPY $d2
- G_STORE %3, %ptr :: (store (s64) into %ir.addr)
+ %3:fpr(i64) = COPY $d2
+ G_STORE %3, %ptr :: (store (i64) into %ir.addr)
...
---
name: strwrox
@@ -106,9 +106,9 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $w2
; CHECK-NEXT: STRWroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s32) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
- %3:gpr(s32) = COPY $w2
+ %3:gpr(i32) = COPY $w2
G_STORE %3, %ptr :: (store (s32) into %ir.addr)
...
---
@@ -129,9 +129,9 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr32 = COPY $s2
; CHECK-NEXT: STRSroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s32) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
- %3:fpr(s32) = COPY $s2
+ %3:fpr(i32) = COPY $s2
G_STORE %3, %ptr :: (store (s32) into %ir.addr)
...
---
@@ -152,7 +152,7 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr16 = COPY $h0
; CHECK-NEXT: STRHroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (s16) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
%3:fpr(s16) = COPY $h0
G_STORE %3, %ptr :: (store (s16) into %ir.addr)
@@ -173,12 +173,12 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64sp = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q2
- ; CHECK-NEXT: STRQroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (<2 x s64>) into %ir.addr)
+ ; CHECK-NEXT: STRQroX [[COPY2]], [[COPY]], [[COPY1]], 0, 0 :: (store (<2 x i64>) into %ir.addr)
%0:gpr(p0) = COPY $x0
- %1:gpr(s64) = COPY $x1
+ %1:gpr(i64) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %0, %1
- %2:fpr(<2 x s64>) = COPY $q2
- G_STORE %2, %ptr :: (store (<2 x s64>) into %ir.addr)
+ %2:fpr(<2 x i64>) = COPY $q2
+ G_STORE %2, %ptr :: (store (<2 x i64>) into %ir.addr)
...
---
name: shl_fast_3
@@ -196,14 +196,14 @@ body: |
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
- ; CHECK-NEXT: STRXroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s64) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 3
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ ; CHECK-NEXT: STRXroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (i64) into %ir.addr)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 3
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
- %4:gpr(s64) = COPY $x2
- G_STORE %4, %ptr :: (store (s64) into %ir.addr)
+ %4:gpr(i64) = COPY $x2
+ G_STORE %4, %ptr :: (store (i64) into %ir.addr)
...
---
name: shl_slow_1
@@ -223,12 +223,12 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
; CHECK-NEXT: STRHHroX [[COPY3]], [[COPY1]], [[COPY]], 0, 1 :: (store (s16) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 1
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 1
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
- %4:gpr(s64) = COPY $x2
+ %4:gpr(i64) = COPY $x2
G_STORE %4, %ptr :: (store (s16) into %ir.addr)
...
---
@@ -263,12 +263,12 @@ body: |
; CHECK-SLOW-NEXT: STRHHui [[COPY3]], %ptr, 0 :: (store (s16) into %ir.addr)
; CHECK-SLOW-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY2]].sub_32
; CHECK-SLOW-NEXT: STRHHui [[COPY4]], %ptr, 0 :: (store (s16) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 1
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 1
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
- %4:gpr(s64) = COPY $x2
+ %4:gpr(i64) = COPY $x2
%5:gpr(s16) = G_TRUNC %4
G_STORE %4, %ptr :: (store (s16) into %ir.addr)
G_STORE %4, %ptr :: (store (s16) into %ir.addr)
@@ -290,9 +290,9 @@ body: |
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY $x1
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-NEXT: STRQroX [[COPY2]], [[COPY1]], [[COPY]], 0, 1 :: (store (s128) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 4
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 4
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
%5:fpr(s128) = COPY $q0
@@ -326,9 +326,9 @@ body: |
; CHECK-SLOW-NEXT: [[COPY2:%[0-9]+]]:fpr128 = COPY $q0
; CHECK-SLOW-NEXT: STRQui [[COPY2]], %ptr, 0 :: (store (s128) into %ir.addr)
; CHECK-SLOW-NEXT: STRQui [[COPY2]], %ptr, 0 :: (store (s128) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 4
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 4
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
%5:fpr(s128) = COPY $q0
@@ -353,9 +353,9 @@ body: |
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY $x2
; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY [[COPY2]]
; CHECK-NEXT: STRXroX [[COPY3]], [[COPY1]], [[COPY]], 0, 1 :: (store (p0) into %ir.addr)
- %0:gpr(s64) = COPY $x0
- %1:gpr(s64) = G_CONSTANT i64 3
- %2:gpr(s64) = G_SHL %0, %1(s64)
+ %0:gpr(i64) = COPY $x0
+ %1:gpr(i64) = G_CONSTANT i64 3
+ %2:gpr(i64) = G_SHL %0, %1(i64)
%3:gpr(p0) = COPY $x1
%ptr:gpr(p0) = G_PTR_ADD %3, %2
%4:gpr(p0) = COPY $x2
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