[llvm] [AArch64] NFC: simplify isCopyInstrImpl expression (PR #212487)
Benjamin Maxwell via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 28 07:10:42 PDT 2026
================
@@ -11356,18 +11356,19 @@ AArch64InstrInfo::isCopyInstrImpl(const MachineInstr &MI) const {
// AArch64::ORRWrs and AArch64::ORRXrs with WZR/XZR reg
// and zero immediate operands used as an alias for mov instruction.
- if (((MI.getOpcode() == AArch64::ORRWrs &&
- MI.getOperand(1).getReg() == AArch64::WZR &&
- MI.getOperand(3).getImm() == 0x0) ||
- (MI.getOpcode() == AArch64::ORRWrr &&
- MI.getOperand(1).getReg() == AArch64::WZR)) &&
- // Check that the w->w move is not a zero-extending w->x mov.
- (!MI.getOperand(0).getReg().isVirtual() ||
- MI.getOperand(0).getSubReg() == 0) &&
- (!MI.getOperand(0).getReg().isPhysical() ||
- MI.findRegisterDefOperandIdx(getXRegFromWReg(MI.getOperand(0).getReg()),
- /*TRI=*/nullptr) == -1))
- return DestSourcePair{MI.getOperand(0), MI.getOperand(2)};
+ if ((MI.getOpcode() == AArch64::ORRWrs &&
+ MI.getOperand(1).getReg() == AArch64::WZR &&
+ MI.getOperand(3).getImm() == 0x0) ||
+ (MI.getOpcode() == AArch64::ORRWrr &&
+ MI.getOperand(1).getReg() == AArch64::WZR))
----------------
MacDue wrote:
nit: I think it's worth adding `{}` for the outer `if` as it's covering a fairly large block now.
https://github.com/llvm/llvm-project/pull/212487
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