[llvm] [AMDGPU] Check hasNoF16PseudoScalarTransInlineConstants in more places (PR #208459)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 9 09:18:07 PDT 2026


================
@@ -4735,6 +4735,30 @@ bool SIInstrInfo::isInlineConstant(int64_t Imm, uint8_t OperandType) const {
   }
 }
 
+bool SIInstrInfo::isInlineConstant(const MachineInstr &MI, unsigned OpIdx,
+                                   int64_t ImmVal) const {
+  if (OpIdx >= MI.getDesc().NumOperands)
+    return false;
+
+  if (isCopyInstr(MI)) {
+    unsigned Size = getOpSize(MI, OpIdx);
+    assert(Size == 8 || Size == 4);
+
+    uint8_t OpType = (Size == 8) ? AMDGPU::OPERAND_REG_IMM_INT64
+                                 : AMDGPU::OPERAND_REG_IMM_INT32;
+    return isInlineConstant(ImmVal, OpType);
+  }
+
+  if (!isInlineConstant(ImmVal, MI.getDesc().operands()[OpIdx].OperandType))
+    return false;
+
+  if (ST.hasNoF16PseudoScalarTransInlineConstants() &&
----------------
arsenm wrote:

This needs to be at the bottom of the mess of is*Constant functions. The isInlineConstant above also needs to be correct 

https://github.com/llvm/llvm-project/pull/208459


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