[llvm] [SPARC] Don't combine misaligned memory ops with BSWAP (PR #206345)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jul 5 03:53:56 PDT 2026
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@@ -3300,10 +3304,15 @@ SDValue SparcTargetLowering::PerformSTORECombine(SDNode *N,
SDValue Op = N->getOperand(1);
EVT VT = Op.getValueType();
unsigned Opcode = Op.getOpcode();
+ Type *Ty = VT.getTypeForEVT(*DAG.getContext());
+ StoreSDNode *SN = dyn_cast<StoreSDNode>(N);
+
bool IsLittleEndian = DAG.getDataLayout().isLittleEndian();
+ bool IsAlignedStore = SN && SN->getAlign() >= VT.getScalarStoreSize();
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koachan wrote:
As in `MemVT.getScalarStoreSize()`?
https://github.com/llvm/llvm-project/pull/206345
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