[llvm] [SPARC] Don't combine misaligned memory ops with BSWAP (PR #206345)

[Sergei Barannikov via llvm-commits]

================
@@ -3266,9 +3266,14 @@ SDValue SparcTargetLowering::PerformBSWAPCombine(SDNode *N,
   EVT VT = N->getValueType(0);
   bool IsLittleEndian = DAG.getDataLayout().isLittleEndian();
 
-  // Turn BSWAP (LOAD) -> ld*a #ASI_P(_L) on V9.
-  if (Subtarget->isV9() && ISD::isNormalLoad(Op.getNode()) &&
-      Op.getNode()->hasOneUse() &&
+  LoadSDNode *LN = dyn_cast<LoadSDNode>(Op.getNode());
+  bool IsAlignedLoad =
+      LN && ISD::isNormalLoad(Op.getNode()) &&
+      allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(), VT,
----------------
s-barannikov wrote:

I guess so, yes

https://github.com/llvm/llvm-project/pull/206345