[llvm] [X86] Add vXi64 MULHU lowering, keeping full-width products scalar (PR #206983)
Rito Takeuchi via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 2 02:12:53 PDT 2026
Licht-T wrote:
@phoebewang @Andarwinux I meant the performance regression between pre-#169819 and #169819, not between microarchitectures. The key is #169819 degrades the div performance by 0.48x on SPR w/ AVX-512.
Please see Result 3 in https://github.com/llvm/llvm-project/pull/169819#issuecomment-4845099097 for more details.
https://github.com/llvm/llvm-project/pull/206983
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