[llvm] [X86] Add vXi64 MULHU lowering, keeping full-width products scalar (PR #206983)

[Phoebe Wang via llvm-commits]

phoebewang wrote:

> @phoebewang Do you know what's going on here? Why has vpmullq actually regressed on SPR as a successor to ICL? But according to [uops.info](https://uops.info/html-instr/VPMULLQ_ZMM_ZMM_ZMM.html), vpmullq is essentially similar on ICL and EMR.

I checked it on both ICL and SPR with #169819:

SPR (Max 9480)
```
udiv_vec     ns med=  0.413 [0.413..0.414]  MHz=3500  0.481
div_vec      ns med=  0.498 [0.497..0.571]  MHz=3500  0.581
wyhash       ns med=  1.259 [1.257..1.283]  MHz=3500  1.469
fp_adv c0    ns med=  0.876 [0.876..0.877]  MHz=3500  1.022
fp_adv c1    ns med=  1.506 [1.504..1.509]  MHz=3400  1.707
```

ICL (Platinum 8380)
```
udiv_vec     ns med=  0.549 [0.549..0.550]  MHz=3000
div_vec      ns med=  0.768 [0.766..0.769]  MHz=3000
wyhash       ns med=  1.782 [1.781..1.782]  MHz=3000
fp_adv c0    ns med=  0.999 [0.999..1.000]  MHz=3000
fp_adv c1    ns med=  2.603 [2.603..2.604]  MHz=3000
```

The last column is the calibrated number using ICL's frequency. `fp_adv c0` is approximate, while the rest are all better than ICL.

https://github.com/llvm/llvm-project/pull/206983