[llvm] [RISCV] Add HasStdExtH to hfence.gvma and hfence.vvma aliases (PR #207061)

[Mark Zhuang via llvm-commits]

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@@ -14,13 +14,19 @@ sfence.w.inval 0x10 # CHECK: :[[@LINE]]:1: error: invalid instruction
 
 sfence.inval.ir 0x10 # CHECK: :[[@LINE]]:1: error: invalid instruction
 
-hfence.vvma zero, a1, a2 # CHECK: :[[@LINE]]:1: error: invalid instruction
+hfence.vvma zero, a1, a2
+# CHECK: :[[#@LINE-1]]:1: error: invalid instruction, any one of the following would fix this:
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zqb-all wrote:

Reporting both doesn't really fit today: the header says "any one of the following would fix this", but here you'd need to fix the operand and enable H, so listing them as alternatives is misleading. It'd probably need a separate "all of the following" mode.
Haven't thought about the implementation details though, just a semantic note.

https://github.com/llvm/llvm-project/pull/207061