[llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)

[Matt Arsenault via llvm-commits]

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@@ -7033,6 +7033,67 @@ static SDValue combineSelectAsExtAnd(SDValue Cond, SDValue T, SDValue F,
   return DAG.getNode(ISD::AND, DL, OpVT, CondMask, T.getOperand(0));
 }
 
+/// Try to convert
+/// `(vXiY SELECT \p Cond, (vXiY \p TrueVal), (vXiY \p FalseVal))` into
+/// `(vPiQ SELECT Cond, (vPiQ NewTrue), (vPiQ NewFalse))` with:
+/// 1. vXiY is not legal type
+/// 2. vPiQ is legal type
+/// 3. X * Y = P * Q
+/// This prevents promotion of integer vectors like v32i4 to v32i16
+/// which can create more type casting operations.
+static SDValue castIntVectorSelect(SDNode *N, SelectionDAG &DAG,
+                                   const TargetLowering &TLI, SDValue Cond,
+                                   SDValue TrueVal, SDValue FalseVal) {
+  EVT ResultVT = N->getValueType(0);
+  if (ResultVT.isScalableVector() || TLI.isTypeLegal(ResultVT))
+    return SDValue();
+
+  EVT EltVT = ResultVT.getVectorElementType();
+  if (!EltVT.isInteger())
+    return SDValue();
+
+  // Widen vector to power of 2
+  if (!ResultVT.isSimple() && !ResultVT.isPow2VectorType() &&
+      TLI.getTypeAction(*DAG.getContext(), ResultVT) ==
+          TargetLowering::TypeWidenVector) {
+    SDValue WidenTrue = DAG.WidenVector(TrueVal, SDLoc(TrueVal));
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arsenm wrote:

WidenVector is still using UNDEF instead of POISON, should separately fix that

https://github.com/llvm/llvm-project/pull/173328