[llvm] [PeepholeOptimizer] Add REG_SEQUENCE subregister use folding (PR #205795)

[Matt Arsenault via llvm-commits]

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@@ -1739,6 +1764,119 @@ bool PeepholeOptimizerLegacy::runOnMachineFunction(MachineFunction &MF) {
   return Impl.run(MF);
 }
 
+/// Check if a REG_SEQUENCE subregister use can be safely rewritten to use
+/// the source register directly.
+bool PeepholeOptimizer::canRewriteRegSequenceSubRegUse(MachineOperand &UseMO,
+                                                       RegSubRegPair Src) {
+  if (!Src.Reg.isValid() || !Src.Reg.isVirtual())
+    return false;
+
+  MachineInstr *UseMI = UseMO.getParent();
+  Register DstReg = UseMO.getReg();
+
+  // Instructions, e.g. AMDGPU S_MOVRELS_B32, may require specific
+  // subregister relationships with implicit operands. Replacing the
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arsenm wrote:

The instruction definitions are broken and should be fixed rather than increasing API complexity. We shouldn't have these arbitrary rules on instructions, and they're hacks for missing register classes or not using target specific variants for the instructions. A more tolerable "short" term workaround would be to always use substituteRegister so all operands are consistently updated in the instruction 

https://github.com/llvm/llvm-project/pull/205795