[llvm] [AMDGPU][GlobalISel] Reduce instruction count for store in global addrspace for non-powers-of-2 (PR #206043)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm commented:

This shouldn't require custom lowering. 

I've complained about this before (and I have a 6 year old branch working on fixing this), but the way we write load and store legalization rules is broken. We're abusing the legality rules for the register type to legalize the memory type. We should simplify the rules here to only specify the actions for the register values. The lower() action in LegalizerHelper should figure out the correct way to break down the memory type into the appropriate set of loads or extending loads 

https://github.com/llvm/llvm-project/pull/206043