[llvm] [RISCV][XCV] Add LLVM intrinsics and patterns for XCVsimd (PR #204880)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 24 07:15:11 PDT 2026


VittorioBurani wrote:

Quick follow-up: I tested against CORE-V GCC (VCS simulation). GCC lets you declare vector types but does not accelerate them via XCVsimd; the opcodes are only reached through its builtins. So I think Clang can support both as
a strict superset: the GCC-aligned builtins as the C API, plus IR-vector acceleration as an extra, with an Expand scalarization fallback for ops that have no single instruction.

I have written up the direction on the RFC; let's settle it there: 
https://discourse.llvm.org/t/rfc-core-v-xcv-support-for-cv32e40p-clang-builtins-xcvsimd-intrinsics-and-generic-auto-selection/91111

https://github.com/llvm/llvm-project/pull/204880


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