[llvm] 0e21d7c - [DA] Add test for addrec can wrap in GCD MIV (NFC) (#203526)

via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 14 23:43:17 PDT 2026


Author: Ryotaro Kasuga
Date: 2026-06-15T06:43:12Z
New Revision: 0e21d7cd0ed0cf35021b929efd2832829fc66eb4

URL: https://github.com/llvm/llvm-project/commit/0e21d7cd0ed0cf35021b929efd2832829fc66eb4
DIFF: https://github.com/llvm/llvm-project/commit/0e21d7cd0ed0cf35021b929efd2832829fc66eb4.diff

LOG: [DA] Add test for addrec can wrap in GCD MIV (NFC) (#203526)

This patch adds a test that should have been included in #186892. The
test demonstrates a case where the GCD MIV test would miss a dependency
if the presence of nsw flags were not checked.

Added: 
    llvm/test/Analysis/DependenceAnalysis/gcd-miv-addrec-wrap.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Analysis/DependenceAnalysis/gcd-miv-addrec-wrap.ll b/llvm/test/Analysis/DependenceAnalysis/gcd-miv-addrec-wrap.ll
new file mode 100644
index 0000000000000..ed9ac14f5b411
--- /dev/null
+++ b/llvm/test/Analysis/DependenceAnalysis/gcd-miv-addrec-wrap.ll
@@ -0,0 +1,73 @@
+; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 6
+; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-dependence-test=default 2>&1 \
+; RUN:     | FileCheck %s --check-prefixes=CHECK,CHECK-DEFAULT
+; RUN: opt < %s -disable-output "-passes=print<da>" -da-enable-dependence-test=gcd-miv 2>&1 \
+; RUN:     | FileCheck %s --check-prefixes=CHECK,CHECK-GCD-MIV
+
+; a = 6148914691236517210; // 6148914691236517210 = ((2^64) - 1) / 3 + 5
+; for (i = 0; i < 10; i++)
+;   for (j = 0; j < 10; j++) {
+;     if (0 <=s a*i)
+;       A[a*i + 5*j] = 0;
+;     A[5*i - 15*j + 14] = 1;
+;   }
+;
+; The dependency exists between the two stores, for example,
+;
+;  memory access        | (i,j) == (0,0) | (i,j) == (3,0) | (i,j) == (3,1) | (i,j) == (7,2)
+; ----------------------|----------------|----------------|----------------|----------------
+;  A[a*i + 5*j]         |                | A[14]          | A[19]          |
+;  A[5*i - 15*j + 14]   | A[14]          |                | A[14]          | A[19]
+;
+define void @gcd_miv_no_nsw(ptr %A) {
+; CHECK-LABEL: 'gcd_miv_no_nsw'
+; CHECK-NEXT:  Src: store i8 0, ptr %gep.0, align 1 --> Dst: store i8 0, ptr %gep.0, align 1
+; CHECK-NEXT:    da analyze - output [* *]!
+; CHECK-NEXT:  Src: store i8 0, ptr %gep.0, align 1 --> Dst: store i8 1, ptr %gep.1, align 1
+; CHECK-NEXT:    da analyze - output [* *|<]!
+; CHECK-NEXT:  Src: store i8 1, ptr %gep.1, align 1 --> Dst: store i8 1, ptr %gep.1, align 1
+; CHECK-NEXT:    da analyze - output [* *]!
+;
+entry:
+  br label %for.i.header
+
+for.i.header:
+  %i = phi i64 [ 0, %entry ], [ %i.inc, %for.i.latch ]
+  %offset.i.0 = phi i64 [ 0, %entry ], [ %offset.i.0.next, %for.i.latch ]
+  %offset.i.1 = phi i64 [ 14, %entry ], [ %offset.i.1.next, %for.i.latch ]
+  br label %for.j.header
+
+for.j.header:
+  %j = phi i64 [ 0, %for.i.header ], [ %j.inc, %for.j.latch ]
+  %j.5 = mul i64 %j, 5
+  %j.m15 = mul i64 %j, -15
+  %offset.0 = add i64 %offset.i.0, %j.5
+  %offset.1 = add i64 %offset.i.1, %j.m15
+  %cond = icmp sge i64 %offset.i.0, 0
+  br i1 %cond, label %if.then, label %for.j.latch
+
+if.then:
+  %gep.0 = getelementptr i8, ptr %A, i64 %offset.0
+  store i8 0, ptr %gep.0
+  br label %for.j.latch
+
+for.j.latch:
+  %gep.1 = getelementptr i8, ptr %A, i64 %offset.1
+  store i8 1, ptr %gep.1
+  %j.inc = add i64 %j, 1
+  %ec.j = icmp eq i64 %j.inc, 10
+  br i1 %ec.j, label %for.i.latch, label %for.j.header
+
+for.i.latch:
+  %i.inc = add i64 %i, 1
+  %offset.i.0.next = add i64 %offset.i.0, 6148914691236517210
+  %offset.i.1.next = add i64 %offset.i.1, 5
+  %ec.i = icmp eq i64 %i.inc, 10
+  br i1 %ec.i, label %exit, label %for.i.header
+
+exit:
+  ret void
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-DEFAULT: {{.*}}
+; CHECK-GCD-MIV: {{.*}}


        


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