[llvm] [AMDGPU][true16] extract 16bit for scratch_load_ubyte_st when spilling (PR #203589)

[Matt Arsenault via llvm-commits]

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@@ -1939,7 +1939,8 @@ void SIRegisterInfo::buildSpillLoadStore(
     }
 
     Register FinalValueReg = ValueReg;
-    if (LoadStoreOp == AMDGPU::SCRATCH_LOAD_USHORT_SADDR) {
+    if (LoadStoreOp == AMDGPU::SCRATCH_LOAD_USHORT_SADDR ||
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arsenm wrote:

Can you add a mir test for this 

https://github.com/llvm/llvm-project/pull/203589