[llvm] [AMDGPU] Support global address in V/S_MOV_B64 lowering (PR #203527)

[Matt Arsenault via llvm-commits]

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@@ -2088,6 +2088,27 @@ bool SIInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
   MachineBasicBlock &MBB = *MI.getParent();
   DebugLoc DL = MBB.findDebugLoc(MI);
   const AMDGPU::LaneMaskConstants &LMC = AMDGPU::LaneMaskConstants::get(ST);
+
+  // Materialize the two halves of a 64-bit global address using absolute
+  // hi/lo relocations. Used to lower V_MOV_B64_PSEUDO / S_MOV_B64_IMM_PSEUDO
+  // when the source operand is a GlobalValue.
+  auto LowerMovB64GlobalAddress = [&](unsigned MovOpc) {
+    Register Dst = MI.getOperand(0).getReg();
+    Register DstLo = RI.getSubReg(Dst, AMDGPU::sub0);
+    Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);
+    const MachineOperand &SrcOp = MI.getOperand(1);
+    const GlobalValue *GV = SrcOp.getGlobal();
+    int64_t Offset = SrcOp.getOffset();
+    unsigned BaseFlags = SrcOp.getTargetFlags() &
+      ~(SIInstrInfo::MO_ABS32_LO | SIInstrInfo::MO_ABS32_HI);
+    BuildMI(MBB, MI, DL, get(MovOpc), DstLo)
+      .addGlobalAddress(GV, Offset, BaseFlags | SIInstrInfo::MO_ABS32_LO)
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arsenm wrote:

Assuming the relocation type ? This would need to be some split relocation function? 

https://github.com/llvm/llvm-project/pull/203527