[llvm] [X86] Reuse AND flags for redundant TEST with known SF (PR #202918)

[Phoebe Wang via llvm-commits]

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@@ -1052,25 +1110,25 @@ findRedundantFlagInstr(MachineInstr &CmpInstr, MachineInstr &CmpValDefInstr,
   // redundant.
   assert(
       (MRI->getVRegDef(CmpInstr.getOperand(0).getReg()) == &CmpValDefInstr) &&
-      "Caller guarantees that TEST64rr is a user of SUBREG_TO_REG or TEST16rr "
-      "is a user of COPY sub16bit.");
+      "Caller guarantees that TEST64rr is a user of SUBREG_TO_REG or TEST8rr/"
+      "TEST16rr is a user of COPY.");
   MachineInstr *VregDefInstr = nullptr;
-  if (CmpInstr.getOpcode() == X86::TEST16rr) {
+  if (IsCopyNarrowTest) {
     if (!CmpValDefInstr.getOperand(1).getReg().isVirtual())
       return false;
     VregDefInstr = MRI->getVRegDef(CmpValDefInstr.getOperand(1).getReg());
     if (!VregDefInstr)
       return false;
-    // We can only remove test when AND32ri or AND64ri32 whose imm can fit 16bit
-    // size, others 32/64 bit ops would test higher bits which test16rr don't
-    // want to.
+    // We can only remove test when AND32ri or AND64ri32 whose imm can fit the
+    // test width. Otherwise, the wide AND may test higher bits that the narrow
+    // TEST does not.
     if (!((VregDefInstr->getOpcode() == X86::AND32ri ||
            VregDefInstr->getOpcode() == X86::AND64ri32) &&
----------------
phoebewang wrote:

This will bail out for NDD cases. So it cannot work for NDD so far. Besides, NDD 8/16 bit AND won't extend to 32-bit.

https://github.com/llvm/llvm-project/pull/202918