[llvm] [AMDGPU] Fix GISel lowering for amdgcn_s_quadmask, amdgcn_s_wqm (PR #202704)

Chinmay Deshpande via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 9 09:08:53 PDT 2026


https://github.com/chinmaydd created https://github.com/llvm/llvm-project/pull/202704

None

>From 03361ec46e43e46bc8ad3d6dc93b2c66c545efa9 Mon Sep 17 00:00:00 2001
From: Chinmay Deshpande <chdeshpa at amd.com>
Date: Tue, 9 Jun 2026 11:53:47 -0400
Subject: [PATCH] [AMDGPU] Mark amdgcn_s_quadmask, amdgcn_s_wqm as
 AlwaysUniform

---
 llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp | 8 +++-----
 llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td      | 2 ++
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
index 3b14e9661d7db..1a54b3f813c6b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
@@ -1744,11 +1744,9 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
   addRulesForIOpcs({amdgcn_readlane}, StandardB)
       .Uni(B32, {{SgprB32}, {IntrId, VgprB32, SgprB32_ReadFirstLane}});
 
-  addRulesForIOpcs({amdgcn_s_quadmask, amdgcn_s_wqm}, StandardB)
-      .Uni(B32, {{SgprB32}, {IntrId, SgprB32}})
-      .Div(B32, {{Sgpr32ToVgprDst}, {IntrId, SgprB32_ReadFirstLane}})
-      .Uni(B64, {{SgprB64}, {IntrId, SgprB64}})
-      .Div(B64, {{Sgpr64ToVgprDst}, {IntrId, SgprB64_ReadFirstLane}});
+  addRulesForIOpcs({amdgcn_s_quadmask, amdgcn_s_wqm})
+      .Any({{B32}, {{SgprB32}, {IntrId, SgprB32_ReadFirstLane}}})
+      .Any({{B64}, {{SgprB64}, {IntrId, SgprB64_ReadFirstLane}}});
 
   addRulesForIOpcs({amdgcn_writelane}, StandardB)
       .Div(B32,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td b/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
index 0968d7030578b..2f7f72bd58f0e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
@@ -420,6 +420,8 @@ def : AlwaysUniform<int_amdgcn_s_getpc>;
 def : AlwaysUniform<int_amdgcn_s_getreg>;
 def : AlwaysUniform<int_amdgcn_s_memrealtime>;
 def : AlwaysUniform<int_amdgcn_s_memtime>;
+def : AlwaysUniform<int_amdgcn_s_quadmask>;
+def : AlwaysUniform<int_amdgcn_s_wqm>;
 
 def AMDGPUImageDMaskIntrinsicTable : GenericTable {
   let FilterClass = "AMDGPUImageDMaskIntrinsic";



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