[llvm] [AArch64] SME definitions for C1-Ultra scheduling model (PR #194850)

[David Green via llvm-commits]

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@@ -11583,7 +11583,7 @@ defm UMIN : ComparisonOp<1, 1, "umin", umin>, Requires<[HasCSSC]>;
 def RPRFM:
     I<(outs), (ins rprfop:$Rt, GPR64:$Rm, GPR64sp:$Rn),
       "rprfm", "\t$Rt, $Rm, [$Rn]", "", []>,
-    Sched<[]> {
+    Sched<[WriteI]> {
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davemgreen wrote:

Any reason to pick WriteI? I would expect something more like WriteLD from the other prefetches.

https://github.com/llvm/llvm-project/pull/194850