[llvm] [AArch64] SME definitions for C1-Ultra scheduling model (PR #194850)

[David Green via llvm-commits]

================
@@ -0,0 +1,21 @@
+addva za0.s, p0/m, p0/m, z0.s
+bmopa za0.s, p0/m, p0/m, z0.s, z0.s
+fmopa za0.s, p0/m, p0/m, z0.h, z0.h
----------------
davemgreen wrote:

I don't see instructions like UMOPA being tested. Should the be? Can you make sure there is a decent coverage of SME instructions. I was looking for multi-vector sel.

https://github.com/llvm/llvm-project/pull/194850