[llvm] [AMDGPU] Fold isnan+fptosi select to fptosi (PR #200960)

[Adel Ejjeh via llvm-commits]

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@@ -18412,6 +18412,41 @@ SDValue SITargetLowering::performSelectCombine(SDNode *N,
   SDValue RHS = Cond.getOperand(1);
   ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
 
+  // Fold: select (setcc X, NonNaN, SETUO), 0, (fp_to_sint X) -> fp_to_sint X
+  // Fold: select (setcc X, NonNaN, SETO), (fp_to_sint X), 0 -> fp_to_sint X
+  // Also look through an AND mask on the fp_to_sint result.
+  // V_CVT_I32_F32, V_CVT_U32_F32, V_CVT_I32_F64, V_CVT_U32_F64 already
+  // return 0 for NaN inputs, so the isnan guard is redundant.
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adelejjeh wrote:

I took the approach of generate the SAT node instead

https://github.com/llvm/llvm-project/pull/200960