[llvm] [ISel] Introduce `llvm.pext` and `llvm.pdep` intrinsics (PR #200570)

[Craig Topper via llvm-commits]

================
@@ -8629,6 +8642,36 @@ SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
     return LowerPARTIAL_REDUCE_MLA(Op, DAG);
   case ISD::CLMUL:
     return LowerCLMUL(Op, DAG);
+  case ISD::PEXT:
+  case ISD::PDEP: {
+    // Lower generic PEXT/PDEP to SVE2 intrinsics.
+    SDLoc DL(Op);
+    EVT VT = Op.getValueType();
+    unsigned IntrID = Op.getOpcode() == ISD::PEXT
+                          ? Intrinsic::aarch64_sve_bext_x
+                          : Intrinsic::aarch64_sve_bdep_x;
+
+    if (VT.isScalarInteger()) {
+      assert((VT == MVT::i32 || VT == MVT::i64) && "Unexpected scalar type");
+      EVT NeonVT = VT == MVT::i64 ? MVT::v2i64 : MVT::v4i32;
+      EVT SveVT = VT == MVT::i64 ? MVT::nxv2i64 : MVT::nxv4i32;
+      auto ToScalable = [&](SDValue X) {
+        SDValue V = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, NeonVT, X);
----------------
topperc wrote:

I don't know about the AArch64 expectations, can we do SCALAR_TO_VECTOR directly to the SveVT?

https://github.com/llvm/llvm-project/pull/200570