[llvm] fix sgpr2 vgpr16 test branch (PR #196095)

via llvm-commits llvm-commits at lists.llvm.org
Wed May 6 08:32:50 PDT 2026


github-actions[bot] wrote:

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``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/CodeGen/MachineVerifier.cpp llvm/lib/Target/AMDGPU/SIISelLowering.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.cpp llvm/lib/Target/AMDGPU/SIInstrInfo.h --diff_from_common_commit
``````````

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changing `origin/main` to the base branch/commit you want to compare against.
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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp
index 2667ab5dd..e614918ab 100644
--- a/llvm/lib/CodeGen/MachineVerifier.cpp
+++ b/llvm/lib/CodeGen/MachineVerifier.cpp
@@ -2443,10 +2443,10 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
 
     if (SrcSize.isNonZero() && DstSize.isNonZero() && SrcSize != DstSize) {
       if (!DstOp.getSubReg() && !SrcOp.getSubReg()) {
-		  /*
-        report("Copy Instruction is illegal with mismatching sizes", MI);
-        OS << "Def Size = " << DstSize << ", Src Size = " << SrcSize << '\n';
-		*/
+        /*
+report("Copy Instruction is illegal with mismatching sizes", MI);
+OS << "Def Size = " << DstSize << ", Src Size = " << SrcSize << '\n';
+      */
       }
     }
     break;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 1242ed017..288754290 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5166,9 +5166,9 @@ bool SIInstrInfo::verifyCopy(const MachineInstr &MI,
     ErrInfo = "illegal copy from vector register to SGPR";
     return false;
   }
-  
+
   if (getCGPassBuilderOption().EnableGlobalISelOption == cl::BOU_TRUE)
-	return true;
+    return true;
 
   // check for sreg32/vgpr3/vgpr16 mismatch
   unsigned DstSubReg = MI.getOperand(0).getSubReg();

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https://github.com/llvm/llvm-project/pull/196095


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