[llvm] [TableGen] Emit Debug code for dynamic bits(eg: instruction operands) in DecoderEmitter (PR #194699)

[Craig Topper via llvm-commits]

================
@@ -42,5 +42,7 @@ def InstB : TestInstruction {
 // CHECK-NEXT:                                 // 22: }
 // CHECK-NEXT: };
 
-// CHECK: if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) { DecodeComplete = false; return MCDisassembler::Fail; }
-// CHECK: if (!Check(S, DecodeInstA(MI, insn, Address, Decoder))) { DecodeComplete = false; return MCDisassembler::Fail; }
+// CHECK-LABEL: case 0:
+// CHECK-NEXT:    if (!Check(S, DecodeInstB(MI, insn, Address, Decoder))) return dbgFail("InstB: insn using DecodeInstB", &DecodeComplete);
----------------
topperc wrote:

Same here. the ": insn using " is common to every debug print but will be duplicated many times in the binary. Can we have a specialized function that takes the instruction name and the decode function and builds the message?

https://github.com/llvm/llvm-project/pull/194699