[llvm] [AArch64] Match vector neg(and X, 1) as CMTST (PR #194833)
David Green via llvm-commits
llvm-commits at lists.llvm.org
Fri May 1 11:44:18 PDT 2026
================
@@ -23207,6 +23207,42 @@ static SDValue performAddTruncShiftCombine(SDNode *N, SelectionDAG &DAG) {
return DAG.getNode(ISD::ADD, DL, VT, Trunc, Shift);
}
+static bool isOneVector(SDValue V) {
+ APInt Splat;
+ if (V.getOpcode() == ISD::SPLAT_VECTOR)
+ return ISD::isConstantSplatVector(V.getNode(), Splat) && Splat.isOne();
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davemgreen wrote:
isConstantSplatVector should work for buildvectors too, to help simplify this a bit. The isOneVector could be defined up next to isZerosVector too.
https://github.com/llvm/llvm-project/pull/194833
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