[llvm] [DAGCombiner] Teach `reduceLoadWidth` to look past `ISD:FREEZE` (PR #189317)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> If its identical to the IR freeze, then `zext(freeze(load)) -> freeze(zextload)` in #175022 also invalid per the semantics of freeze. But since we are in the machine land, this is accepted? That's what I'm trying to answer.

I don't think your failing alive2 link is representative of what a zextload entails. The alive link uses an i32 as the source value, but the zextload only needs to freeze the low byte; the low i8 is the only maybe-undef component that needs freezing 


https://github.com/llvm/llvm-project/pull/189317