[llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)

[Mel Chen via llvm-commits]

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@@ -1143,6 +1143,31 @@ InstructionCost RISCVTTIImpl::getInterleavedMemoryOpCost(
     return InstructionCost::getInvalid();
 
   auto *FVTy = cast<FixedVectorType>(VecTy);
+  // When gaps are only at the tail, for interleaved load, we can emit a wide
+  // masked load and shufflevectors. For interleaved store, we can emit
+  // shufflevectors and a wide masked store. The interleaved memory access pass
+  // will lower them into vlsseg/vssseg intrinsics.
+  if (UseMaskForGaps) {
+    unsigned NumOfFields = Indices.size();
+    bool IsTailGapOnly = NumOfFields > 1 && (NumOfFields == Indices.back() + 1);
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Mel-Chen wrote:

6663051b79839c258ed3a303f63563e9381f9dbb
Check the Indices is sorted and has no duplicate element. 

https://github.com/llvm/llvm-project/pull/192074