[llvm] 3b45641 - [NewPM] Adds a port for AArch64PostLegalizerLowering (#190718)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 17 12:12:57 PDT 2026
Author: Anshul Nigham
Date: 2026-04-17T20:12:53+01:00
New Revision: 3b45641a3d9b40c1c7210e4cf66a473a9f720d44
URL: https://github.com/llvm/llvm-project/commit/3b45641a3d9b40c1c7210e4cf66a473a9f720d44
DIFF: https://github.com/llvm/llvm-project/commit/3b45641a3d9b40c1c7210e4cf66a473a9f720d44.diff
LOG: [NewPM] Adds a port for AArch64PostLegalizerLowering (#190718)
Standard porting (extraction into a helper function shared across legacy
and new PM passes).
Dropped unused include `TargetPassConfig.h`
Added:
Modified:
llvm/lib/Target/AArch64/AArch64.h
llvm/lib/Target/AArch64/AArch64PassRegistry.def
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index 81f766080c82a..3e2dbeb7f5b9a 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -16,6 +16,7 @@
#include "MCTargetDesc/AArch64MCTargetDesc.h"
#include "Utils/AArch64BaseInfo.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/Pass.h"
#include "llvm/PassRegistry.h"
@@ -25,6 +26,7 @@
struct AArch64O0PreLegalizerCombinerImplRuleConfig;
struct AArch64PreLegalizerCombinerImplRuleConfig;
+struct AArch64PostLegalizerLoweringImplRuleConfig;
namespace llvm {
@@ -100,6 +102,24 @@ class AArch64PreLegalizerCombinerPass
MachineFunctionAnalysisManager &MFAM);
};
+class AArch64PostLegalizerLoweringPass
+ : public PassInfoMixin<AArch64PostLegalizerLoweringPass> {
+ std::unique_ptr<AArch64PostLegalizerLoweringImplRuleConfig> RuleConfig;
+
+public:
+ AArch64PostLegalizerLoweringPass();
+ AArch64PostLegalizerLoweringPass(AArch64PostLegalizerLoweringPass &&);
+ ~AArch64PostLegalizerLoweringPass();
+
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+
+ MachineFunctionProperties getRequiredProperties() const {
+ return MachineFunctionProperties().set(
+ MachineFunctionProperties::Property::Legalized);
+ }
+};
+
FunctionPass *createAArch64O0PreLegalizerCombiner();
FunctionPass *createAArch64PreLegalizerCombiner();
FunctionPass *createAArch64PostLegalizerCombiner(bool IsOptNone);
@@ -130,7 +150,7 @@ void initializeAArch64MIPeepholeOptLegacyPass(PassRegistry &);
void initializeAArch64O0PreLegalizerCombinerLegacyPass(PassRegistry &);
void initializeAArch64PostCoalescerLegacyPass(PassRegistry &);
void initializeAArch64PostLegalizerCombinerPass(PassRegistry &);
-void initializeAArch64PostLegalizerLoweringPass(PassRegistry &);
+void initializeAArch64PostLegalizerLoweringLegacyPass(PassRegistry &);
void initializeAArch64PostSelectOptimizePass(PassRegistry &);
void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
void initializeAArch64PromoteConstantPass(PassRegistry&);
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index f2f6208e8afe8..d01af931a7a8f 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -38,6 +38,8 @@ MACHINE_FUNCTION_PASS("aarch64-jump-tables", AArch64CompressJumpTablesPass())
MACHINE_FUNCTION_PASS("aarch64-ldst-opt", AArch64LoadStoreOptPass())
MACHINE_FUNCTION_PASS("aarch64-mi-peephole-opt", AArch64MIPeepholeOptPass())
MACHINE_FUNCTION_PASS("aarch64-post-coalescer", AArch64PostCoalescerPass())
+MACHINE_FUNCTION_PASS("aarch64-postlegalizer-lowering",
+ AArch64PostLegalizerLoweringPass())
MACHINE_FUNCTION_PASS("aarch64-prelegalizer-combiner",
AArch64PreLegalizerCombinerPass())
MACHINE_FUNCTION_PASS("aarch64-ptrauth", AArch64PointerAuthPass())
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index a2dbdf2cef1e7..33f39ad82ba9e 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -257,7 +257,7 @@ LLVMInitializeAArch64Target() {
initializeAArch64PointerAuthLegacyPass(PR);
initializeAArch64PostCoalescerLegacyPass(PR);
initializeAArch64PostLegalizerCombinerPass(PR);
- initializeAArch64PostLegalizerLoweringPass(PR);
+ initializeAArch64PostLegalizerLoweringLegacyPass(PR);
initializeAArch64PostSelectOptimizePass(PR);
initializeAArch64PromoteConstantPass(PR);
initializeAArch64RedundantCopyEliminationLegacyPass(PR);
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 2b34a89a1db64..1f8334450e28c 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -19,6 +19,7 @@
///
//===----------------------------------------------------------------------===//
+#include "AArch64.h"
#include "AArch64ExpandImm.h"
#include "AArch64GlobalISelUtils.h"
#include "AArch64PerfectShuffle.h"
@@ -37,11 +38,12 @@
#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetOpcodes.h"
-#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/InstrTypes.h"
#include "llvm/Support/ErrorHandling.h"
#include <optional>
@@ -56,12 +58,12 @@ using namespace llvm;
using namespace MIPatternMatch;
using namespace AArch64GISelUtils;
-namespace {
-
#define GET_GICOMBINER_TYPES
#include "AArch64GenPostLegalizeGILowering.inc"
#undef GET_GICOMBINER_TYPES
+namespace {
+
/// Represents a pseudo instruction which replaces a G_SHUFFLE_VECTOR.
///
/// Used for matching target-supported shuffles before codegen.
@@ -1258,11 +1260,32 @@ AArch64PostLegalizerLoweringImpl::AArch64PostLegalizerLoweringImpl(
{
}
-class AArch64PostLegalizerLowering : public MachineFunctionPass {
+bool runPostLegalizerLowering(
+ MachineFunction &MF,
+ const AArch64PostLegalizerLoweringImplRuleConfig &RuleConfig) {
+ if (MF.getProperties().hasFailedISel())
+ return false;
+ const Function &F = MF.getFunction();
+
+ const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
+ CombinerInfo CInfo(/*AllowIllegalOps=*/true, /*ShouldLegalizeIllegal=*/false,
+ /*LegalizerInfo=*/nullptr, /*OptEnabled=*/true,
+ F.hasOptSize(), F.hasMinSize());
+ // Disable fixed-point iteration to reduce compile-time
+ CInfo.MaxIterations = 1;
+ CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
+ // PostLegalizerCombiner performs DCE, so a full DCE pass is unnecessary.
+ CInfo.EnableFullDCE = false;
+ AArch64PostLegalizerLoweringImpl Impl(MF, CInfo, /*CSEInfo=*/nullptr,
+ RuleConfig, ST);
+ return Impl.combineMachineInstrs();
+}
+
+class AArch64PostLegalizerLoweringLegacy : public MachineFunctionPass {
public:
static char ID;
- AArch64PostLegalizerLowering();
+ AArch64PostLegalizerLoweringLegacy();
StringRef getPassName() const override {
return "AArch64PostLegalizerLowering";
@@ -1276,48 +1299,61 @@ class AArch64PostLegalizerLowering : public MachineFunctionPass {
};
} // end anonymous namespace
-void AArch64PostLegalizerLowering::getAnalysisUsage(AnalysisUsage &AU) const {
+void AArch64PostLegalizerLoweringLegacy::getAnalysisUsage(
+ AnalysisUsage &AU) const {
AU.setPreservesCFG();
getSelectionDAGFallbackAnalysisUsage(AU);
MachineFunctionPass::getAnalysisUsage(AU);
}
-AArch64PostLegalizerLowering::AArch64PostLegalizerLowering()
+AArch64PostLegalizerLoweringLegacy::AArch64PostLegalizerLoweringLegacy()
: MachineFunctionPass(ID) {
if (!RuleConfig.parseCommandLineOption())
report_fatal_error("Invalid rule identifier");
}
-bool AArch64PostLegalizerLowering::runOnMachineFunction(MachineFunction &MF) {
- if (MF.getProperties().hasFailedISel())
- return false;
+bool AArch64PostLegalizerLoweringLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
assert(MF.getProperties().hasLegalized() && "Expected a legalized function?");
- const Function &F = MF.getFunction();
-
- const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
- CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false,
- /*LegalizerInfo*/ nullptr, /*OptEnabled=*/true,
- F.hasOptSize(), F.hasMinSize());
- // Disable fixed-point iteration to reduce compile-time
- CInfo.MaxIterations = 1;
- CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
- // PostLegalizerCombiner performs DCE, so a full DCE pass is unnecessary.
- CInfo.EnableFullDCE = false;
- AArch64PostLegalizerLoweringImpl Impl(MF, CInfo, /*CSEInfo*/ nullptr,
- RuleConfig, ST);
- return Impl.combineMachineInstrs();
+ return runPostLegalizerLowering(MF, RuleConfig);
}
-char AArch64PostLegalizerLowering::ID = 0;
-INITIALIZE_PASS_BEGIN(AArch64PostLegalizerLowering, DEBUG_TYPE,
+char AArch64PostLegalizerLoweringLegacy::ID = 0;
+INITIALIZE_PASS_BEGIN(AArch64PostLegalizerLoweringLegacy, DEBUG_TYPE,
"Lower AArch64 MachineInstrs after legalization", false,
false)
-INITIALIZE_PASS_END(AArch64PostLegalizerLowering, DEBUG_TYPE,
+INITIALIZE_PASS_END(AArch64PostLegalizerLoweringLegacy, DEBUG_TYPE,
"Lower AArch64 MachineInstrs after legalization", false,
false)
+AArch64PostLegalizerLoweringPass::AArch64PostLegalizerLoweringPass()
+ : RuleConfig(
+ std::make_unique<AArch64PostLegalizerLoweringImplRuleConfig>()) {
+ if (!RuleConfig->parseCommandLineOption())
+ reportFatalUsageError("invalid rule identifier");
+}
+
+AArch64PostLegalizerLoweringPass::AArch64PostLegalizerLoweringPass(
+ AArch64PostLegalizerLoweringPass &&) = default;
+
+AArch64PostLegalizerLoweringPass::~AArch64PostLegalizerLoweringPass() = default;
+
+PreservedAnalyses
+AArch64PostLegalizerLoweringPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ MFPropsModifier _(*this, MF);
+ const bool Changed = runPostLegalizerLowering(MF, *RuleConfig);
+
+ if (!Changed)
+ return PreservedAnalyses::all();
+
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
+}
+
namespace llvm {
FunctionPass *createAArch64PostLegalizerLowering() {
- return new AArch64PostLegalizerLowering();
+ return new AArch64PostLegalizerLoweringLegacy();
}
} // end namespace llvm
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
index 591dafc1ad098..80e8b14eb7ed3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/lower-neon-vector-fcmp.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-postlegalizer-lowering -mattr=+fullfp16 %s -o - | FileCheck %s
...
---
name: oeq
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
index 1d24f8acfbc53..afc723693bc10 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-rev.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-postlegalizer-lowering %s -o - | FileCheck %s
#
# Test producing a G_REV from an appropriate G_SHUFFLE_VECTOR.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
index 80eda3db6e04a..c8c61847a0651 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuf-to-ins.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=aarch64 -run-pass=aarch64-postlegalizer-lowering --aarch64postlegalizerlowering-only-enable-rule="shuf_to_ins" -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple=aarch64 -passes=aarch64-postlegalizer-lowering --aarch64postlegalizerlowering-only-enable-rule="shuf_to_ins" %s -o - | FileCheck %s
# REQUIRES: asserts
# Check that we can recognize an ins mask for a shuffle vector.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
index d1d5c6c29ba0d..00d5231cd0899 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-uzp.mir
@@ -4,6 +4,7 @@
# a G_UZP1 or G_UZP2 where appropriate.
#
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-postlegalizer-lowering %s -o - | FileCheck %s
...
---
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
index 2fc90e4bf05a1..247ce7da0e379 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-zip.mir
@@ -4,6 +4,7 @@
# G_ZIP1 or G_ZIP2 where appropriate.
#
# RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-lowering -verify-machineinstrs %s -o - | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes=aarch64-postlegalizer-lowering %s -o - | FileCheck %s
...
---
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