[llvm] [AArch64] Correct comparator in regalloc hints to satisfy strict weak ordering (PR #192383)

[Sander de Smalen via llvm-commits]

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@@ -1158,8 +1158,10 @@ static bool HandleDestructivePredicateHint(
 
   Hints.append(Order.begin(), Order.end());
   llvm::stable_sort(Hints, [&](Register A, Register B) {
-    return A != B && B == Op1Reg &&
-           (!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A));
+    return ((A == Op1Reg) || !(!CSRs.contains(A) || !MRI.def_empty(A) ||
+                               Matrix->isPhysRegUsed(A))) <
+           ((B == Op1Reg) || !(!CSRs.contains(B) || !MRI.def_empty(B) ||
+                               Matrix->isPhysRegUsed(B)));
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sdesmalen-arm wrote:

This boolean logic is doing my head in a bit :)

Can you write it as this instead:

```
auto CanUseReg = [&](Register R) {
  return !CSRs.contains(R) || !MRI.def_empty(R) || Matrix->isPhysRegUsed(R);
};
bool PrefA = A != Op1Reg && CanUseReg(A);
bool PrefB = B != Op1Reg && CanUseReg(B);
return PrefA && !PrefB;
```

?

https://github.com/llvm/llvm-project/pull/192383