[llvm] [AArch64] Correct comparator in regalloc hints to satisfy strict weak ordering (PR #192383)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-aarch64

Author: Leonardo Román Carrillo (leonardo-roman-carrillo)

<details>
<summary>Changes</summary>

The current comparator will have a strict-weak ordering violation for the following scenario:
a = GoodReg ((!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A)) == true) && !Op1Reg
b = BadReg ((!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A)) == false) && !Op1Reg
c = Op1Reg

Then we would have:
a vs c
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A)) = true && true && true ->
a < c

a vs b
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A)) =true && false && false ->
a ~ b

b vs c
A != B && B == Op1Reg && (!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A)) = true && true && false ->
b ~ c

That will result in a strict-weak ordering violation (a < c && a ~ c), with the new implementation we define that a < b && a < c.

---
Full diff: https://github.com/llvm/llvm-project/pull/192383.diff


1 Files Affected:

- (modified) llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp (+4-2) 


``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index f232fa79c7022..662ec6563e28a 100644
--- a/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -1158,8 +1158,10 @@ static bool HandleDestructivePredicateHint(
 
   Hints.append(Order.begin(), Order.end());
   llvm::stable_sort(Hints, [&](Register A, Register B) {
-    return A != B && B == Op1Reg &&
-           (!CSRs.contains(A) || !MRI.def_empty(A) || Matrix->isPhysRegUsed(A));
+    return ((A == Op1Reg) || !(!CSRs.contains(A) || !MRI.def_empty(A) ||
+                               Matrix->isPhysRegUsed(A))) <
+           ((B == Op1Reg) || !(!CSRs.contains(B) || !MRI.def_empty(B) ||
+                               Matrix->isPhysRegUsed(B)));
   });
   return true;
 }

``````````

</details>


https://github.com/llvm/llvm-project/pull/192383