[llvm] [GlobalISel] Fix getShuffleDemandedElts input lanes in computeKnownFPClass (PR #192288)

[David Green via llvm-commits]

https://github.com/davemgreen updated https://github.com/llvm/llvm-project/pull/192288

>From 1909cd2674b75f4232acdc45a47872a27a5e353f Mon Sep 17 00:00:00 2001
From: David Green <david.green at arm.com>
Date: Wed, 15 Apr 2026 18:10:44 +0100
Subject: [PATCH] [GlobalISel] Fix getShuffleDemandedElts input lanes in
 computeKnownFPClass

The number of lanes needs to be for the input type, not the return, as they can
be different in GISel. This prevents an assert about invalid shuffle mask
constant from getShuffleDemandedElts.
---
 .../CodeGen/GlobalISel/GISelValueTracking.cpp |  6 ++---
 .../AArch64/GlobalISel/knownfpclass.ll        | 23 +++++++++++++++++++
 2 files changed, 26 insertions(+), 3 deletions(-)
 create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll

diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 0a58b611c0eca..61280e4da1581 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -1790,9 +1790,9 @@ void GISelValueTracking::computeKnownFPClass(Register R,
       assert(DemandedElts == APInt(1, 1));
       DemandedLHS = DemandedRHS = DemandedElts;
     } else {
-      if (!llvm::getShuffleDemandedElts(DstTy.getNumElements(), Shuf.getMask(),
-                                        DemandedElts, DemandedLHS,
-                                        DemandedRHS)) {
+      unsigned NumElts = MRI.getType(Shuf.getSrc1Reg()).getNumElements();
+      if (!llvm::getShuffleDemandedElts(NumElts, Shuf.getMask(), DemandedElts,
+                                        DemandedLHS, DemandedRHS)) {
         Known.resetAll();
         return;
       }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
new file mode 100644
index 0000000000000..7b4c6558de52f
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
@@ -0,0 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple aarch64 -global-isel -o - %s | FileCheck %s
+
+define <4 x double> @knownfpclass_shuffle(<16 x double> %a) {
+; CHECK-LABEL: knownfpclass_shuffle:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov d0, v1.d[1]
+; CHECK-NEXT:    mov d1, v5.d[1]
+; CHECK-NEXT:    movi v2.2d, #0000000000000000
+; CHECK-NEXT:    mov v0.d[1], v3.d[1]
+; CHECK-NEXT:    mov v1.d[1], v7.d[1]
+; CHECK-NEXT:    fmov v3.2d, #1.00000000
+; CHECK-NEXT:    fcmlt v0.2d, v0.2d, #0.0
+; CHECK-NEXT:    fcmlt v1.2d, v1.2d, #0.0
+; CHECK-NEXT:    bsl v0.16b, v2.16b, v3.16b
+; CHECK-NEXT:    bsl v1.16b, v2.16b, v3.16b
+; CHECK-NEXT:    ret
+entry:
+  %0 = shufflevector <16 x double> %a, <16 x double> zeroinitializer, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
+  %1 = fcmp olt <4 x double> %0, zeroinitializer
+  %2 = select <4 x i1> %1, <4 x double> zeroinitializer, <4 x double> splat (double 1.000000e+00)
+  ret <4 x double> %2
+}