[llvm] [GlobalISel] Fix getShuffleDemandedElts input lanes in computeKnownFPClass (PR #192288)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64

@llvm/pr-subscribers-llvm-globalisel

Author: David Green (davemgreen)

<details>
<summary>Changes</summary>

The number of lanes needs to be for the input type, not the return, as they can be different in GISel. This prevents an assert about invalid shuffle mask constant from getShuffleDemandedElts.

---
Full diff: https://github.com/llvm/llvm-project/pull/192288.diff


2 Files Affected:

- (modified) llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp (+3-3) 
- (added) llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll (+18) 


``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
index 0a58b611c0eca..61280e4da1581 100644
--- a/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
@@ -1790,9 +1790,9 @@ void GISelValueTracking::computeKnownFPClass(Register R,
       assert(DemandedElts == APInt(1, 1));
       DemandedLHS = DemandedRHS = DemandedElts;
     } else {
-      if (!llvm::getShuffleDemandedElts(DstTy.getNumElements(), Shuf.getMask(),
-                                        DemandedElts, DemandedLHS,
-                                        DemandedRHS)) {
+      unsigned NumElts = MRI.getType(Shuf.getSrc1Reg()).getNumElements();
+      if (!llvm::getShuffleDemandedElts(NumElts, Shuf.getMask(), DemandedElts,
+                                        DemandedLHS, DemandedRHS)) {
         Known.resetAll();
         return;
       }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
new file mode 100644
index 0000000000000..da299f7e43f19
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass.ll
@@ -0,0 +1,18 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple aarch64 -global-isel -o - %s | FileCheck %s
+
+define <4 x double> @knownfpclass_shuffle() {
+; CHECK-LABEL: knownfpclass_shuffle:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    movi v0.2d, #0000000000000000
+; CHECK-NEXT:    fmov v1.2d, #1.00000000
+; CHECK-NEXT:    fcmlt v2.2d, v0.2d, #0.0
+; CHECK-NEXT:    bif v0.16b, v1.16b, v2.16b
+; CHECK-NEXT:    mov v1.16b, v0.16b
+; CHECK-NEXT:    ret
+entry:
+  %0 = shufflevector <16 x double> zeroinitializer, <16 x double> zeroinitializer, <4 x i32> <i32 3, i32 7, i32 11, i32 15>
+  %1 = fcmp olt <4 x double> %0, zeroinitializer
+  %2 = select <4 x i1> %1, <4 x double> zeroinitializer, <4 x double> splat (double 1.000000e+00)
+  ret <4 x double> %2
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/192288