[llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)

[Shilei Tian via llvm-commits]

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@@ -2471,7 +2472,7 @@ bool SchedGroup::canAddMI(const MachineInstr &MI) const {
     Result = true;
 
   else if (((SGMask & SchedGroupMask::VMEM) != SchedGroupMask::NONE) &&
-           TII->isVMEM(MI))
+           (TII->isVMEM(MI) || TII->isLDSDMA(MI)))
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shiltian wrote:

> Why do we allow isLDSDMA for VMEM but not VMEM_READ (or DS_WRITE & DS for that matter) ?

My understanding is that VMEM is a combination of several fine-grained controls. I can make it a hierarchical structure if we want.

> I would think users would appreciate a way to specify VMEM exclusive from LDSDMA, then if they want the combo they can add the masks in the builtins. Though, it may be good to double check.

Oh well, then it doesn't sound consistent. On one hand, it is a load from VMEM, but on the other hand, it is a store to DS.

I'm open to suggestions.

https://github.com/llvm/llvm-project/pull/190872