[llvm] [AMDGPU][InstCombine] Optimize constant shuffle patterns (PR #192246)

[Juan Manuel Martinez Caamaño via llvm-commits]

================
@@ -718,6 +720,324 @@ GCNTTIImpl::hoistLaneIntrinsicThroughOperand(InstCombiner &IC,
   return nullptr;
 }
 
+// Match llvm.amdgcn.mbcnt.lo / mbcnt.hi patterns that compute the lane ID.
+// WaveSize is needed because standalone mbcnt.lo returns lane % 32, which only
+// equals the lane ID on wave32.  On wave64, the full mbcnt.hi(-1, mbcnt.lo(-1, 0))
+// chain is required.
+static bool matchLaneID(const Value *V, unsigned WaveSize) {
+  const auto *II = dyn_cast<IntrinsicInst>(V);
+  if (!II)
+    return false;
+
+  if (II->getIntrinsicID() == Intrinsic::amdgcn_mbcnt_hi) {
+    const auto *Mask = dyn_cast<ConstantInt>(II->getArgOperand(0));
+    if (Mask && Mask->getSExtValue() == -1)
+      return matchLaneID(II->getArgOperand(1), /*WaveSize=*/32);
+    return false;
+  }
+
+  if (II->getIntrinsicID() == Intrinsic::amdgcn_mbcnt_lo) {
+    if (WaveSize > 32)
+      return false;
+    const auto *Mask = dyn_cast<ConstantInt>(II->getArgOperand(0));
+    const auto *Base = dyn_cast<ConstantInt>(II->getArgOperand(1));
+    return Mask && Mask->getSExtValue() == -1 && Base && Base->isZero();
+  }
+
+  return false;
+}
----------------
jmmartinez wrote:

Is this the same as `isThreadID` also from `AMDGPUInstCombineIntrinsic.cpp` ?

https://github.com/llvm/llvm-project/pull/192246