[llvm] [AMDGPU][InstCombine] Optimize constant shuffle patterns (PR #192246)

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git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index 95310e7d0..8e6fa4839 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -722,8 +722,8 @@ GCNTTIImpl::hoistLaneIntrinsicThroughOperand(InstCombiner &IC,
 
 // Match llvm.amdgcn.mbcnt.lo / mbcnt.hi patterns that compute the lane ID.
 // WaveSize is needed because standalone mbcnt.lo returns lane % 32, which only
-// equals the lane ID on wave32.  On wave64, the full mbcnt.hi(-1, mbcnt.lo(-1, 0))
-// chain is required.
+// equals the lane ID on wave32.  On wave64, the full mbcnt.hi(-1, mbcnt.lo(-1,
+// 0)) chain is required.
 static bool matchLaneID(const Value *V, unsigned WaveSize) {
   const auto *II = dyn_cast<IntrinsicInst>(V);
   if (!II)

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https://github.com/llvm/llvm-project/pull/192246