[llvm] [AArch64][ISel] Fix interleave3 crash (PR #192046)

[David Sherwood via llvm-commits]

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@@ -453,3 +453,118 @@ define <32 x bfloat> @interleave4_v32bf16(<8 x bfloat> %vec0, <8 x bfloat> %vec1
   %retval = call <32 x bfloat> @llvm.vector.interleave4.v32bf16(<8 x bfloat> %vec0, <8 x bfloat> %vec1, <8 x bfloat> %vec2, <8 x bfloat> %vec3)
   ret <32 x bfloat> %retval
 }
+
+define void @interleave3_v6f64(ptr %p, ptr %p0, <2 x double> %vec0, <2 x double> %vec1, <2 x double> %vec2) {
+; CHECK-LABEL: interleave3_v6f64:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    zip1 v3.2d, v0.2d, v1.2d
+; CHECK-NEXT:    mov v0.d[0], v2.d[0]
+; CHECK-NEXT:    zip2 v1.2d, v1.2d, v2.2d
+; CHECK-NEXT:    stp q3, q0, [x0]
+; CHECK-NEXT:    str q1, [x0, #32]
+; CHECK-NEXT:    stp q3, q0, [x1]
+; CHECK-NEXT:    str q1, [x1, #32]
+; CHECK-NEXT:    ret
+  %retval = call <6 x double> @llvm.vector.interleave3.v6f64(<2 x double> %vec0, <2 x double> %vec1, <2 x double> %vec2)
+  store <6 x double> %retval, ptr %p
+  store <6 x double> %retval, ptr %p0
+  ret void
+}
+
+define void @interleave3_v12f32(ptr %p, ptr %p0, <4 x float> %vec0, <4 x float> %vec1, <4 x float> %vec2) {
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david-arm wrote:

All tests in this file that don't have 64-bit elements presumably don't crash. Is it worth adding these tests in a separate PR, since they're not really relevant to the bug you're fixing?

https://github.com/llvm/llvm-project/pull/192046