[llvm] [AMDGPU] PreRA Peephole: EliminateSaveRestore (PR #191583)

[Zeng Wu via llvm-commits]

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zwu-2025 wrote:

> > The context of this patch is that we have an assembly code optimizer,
> > which implements the eliminate-save-restore pattern on the generated amdgcn file.
> > The task is to port it to LLVM.
> > If my understanding is correct, the MachineLICM will not hoist the PHI even if it is invariant.
> > So, this patch should be useful?
> 
> #191755 seems to improve MachineLICM. Not sure if that would help in this case, though it looks unlikely.
> 
> I agree with @arsenm that we need an IR test to justify this PR. If this code sequence can't be generated by the pipeline, I'm not sure we really need it.

yes, the MIR is strange, the correct MIR is pasted in the description.

https://github.com/llvm/llvm-project/pull/191583