[llvm] [LV][NFC] Remove unneeded LLVM intrinsic declarations (PR #190993)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 8 08:52:17 PDT 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: David Sherwood (david-arm)
<details>
<summary>Changes</summary>
We no longer need to declare LLVM intrinsics in .ll files as the intrinsics are populated automatically in the module. Remove the declarations from tests to reduce test noise and size.
This came from a suggestion on PR #<!-- -->190786.
---
Patch is 104.67 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/190993.diff
110 Files Affected:
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll (-5)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll (-6)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll (-16)
- (modified) llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll (-64)
- (modified) llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll (-5)
- (modified) llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll (-16)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll (-6)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll (-9)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll (-34)
- (modified) llvm/test/Transforms/LoopVectorize/X86/clmul.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/cost-model.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll (-6)
- (modified) llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll (-8)
- (modified) llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll (-6)
- (modified) llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/pr35432.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll (-16)
- (modified) llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll (-8)
- (modified) llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/assume.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/dbg.value.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/debugloc.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/discriminator.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/fpsat.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/funcall.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/int_sideeffect.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/intrinsic.ll (-67)
- (modified) llvm/test/Transforms/LoopVectorize/is_fpclass.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/lifetime.ll (+8-10)
- (modified) llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/minmax_reduction.ll (-8)
- (modified) llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll (-5)
- (modified) llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/pseudoprobe.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/reduction-inloop.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll (-3)
- (modified) llvm/test/Transforms/LoopVectorize/scalable-assume.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll (+6-8)
- (modified) llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll (-7)
- (modified) llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll (-2)
- (modified) llvm/test/Transforms/LoopVectorize/single_early_exit.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/smax-idx.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll (-1)
- (modified) llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll (-1)
``````````diff
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
index 95b4dcb23dd47..8db00fc0809c5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
@@ -201,11 +201,6 @@ exit:
ret void
}
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.umin.i32(i32, i32)
-declare double @llvm.sqrt.f64(double)
-declare double @llvm.powi.f64.i32(double, i32)
-declare i64 @llvm.fshl.i64(i64, i64, i64)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll b/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
index e453fd4f12a3f..e954db25501d6 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -mtriple=aarch64 -mattr=+crypto -S %s | FileCheck %s
-declare i64 @llvm.clmul.i64(i64 %a, i64 %b)
define void @clmul_loop(ptr %a, ptr %b, ptr %c, i64 %n) {
; CHECK-LABEL: define void @clmul_loop(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
index cec944ee831da..00f94e418c108 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
@@ -47,7 +47,6 @@ exit:
ret void
}
-declare double @llvm.fabs.f64(double) #0
define void @loop_dependent_cond(ptr %src, ptr noalias %dst, i64 %N) {
; DEFAULT-LABEL: define void @loop_dependent_cond(
@@ -1407,8 +1406,6 @@ exit:
ret void
}
-declare float @llvm.fmuladd.f32(float, float, float) #1
-declare double @llvm.pow.f64(double, double)
attributes #1 = { "target-cpu"="neoverse-512tvb" }
attributes #2 = { vscale_range(2,2) "target-cpu"="neoverse-512tvb" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll b/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
index f78ce0ac9a32a..872a559e6c9ce 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
@@ -108,4 +108,3 @@ exit:
ret void
}
-declare double @llvm.fabs.f64(double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
index 92ccabc2031a8..f93a573f54f15 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
@@ -234,6 +234,5 @@ exit:
ret i32 %red.next
}
-declare void @llvm.assume(i1 noundef)
attributes #0 = { "target-cpu"="apple-m1" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
index ea9799428f30a..b3304e6c853ca 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
@@ -97,7 +97,6 @@ exit:
ret void
}
-declare void @llvm.assume(i1 noundef)
define void @test_widen_induction(ptr %A, i64 %N) {
; CHECK-LABEL: @test_widen_induction(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll b/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
index 2ace3b6898652..a0504c46a9262 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
@@ -75,7 +75,6 @@ exit:
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
define void @fmax32(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax32(
@@ -152,7 +151,6 @@ exit:
ret void
}
-declare float @llvm.maximumnum.f32(float, float)
define void @fmin64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin64(
@@ -229,7 +227,6 @@ exit:
ret void
}
-declare double @llvm.minimumnum.f64(double, double)
define void @fmax64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax64(
@@ -306,7 +303,6 @@ exit:
ret void
}
-declare double @llvm.maximumnum.f64(double, double)
define void @fmin16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin16(
@@ -383,7 +379,6 @@ exit:
ret void
}
-declare half @llvm.minimumnum.f16(half, half)
define void @fmax16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax16(
@@ -460,7 +455,6 @@ exit:
ret void
}
-declare half @llvm.maximumnum.f16(half, half)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
index 7b74e42962bfa..2c37201249aaf 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
@@ -910,5 +910,3 @@ exit:
attributes #0 = { "target-features"="+neon,+sve" vscale_range(1,16) }
attributes #1 = { "target-cpu"="neoverse-512tvb" }
-declare void @llvm.assume(i1 noundef)
-declare i64 @llvm.umin.i64(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
index 51c5c907da4ff..30e1aff8e89dd 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
@@ -261,9 +261,7 @@ exit:
ret void
}
-declare i32 @llvm.umin.i32(i32, i32)
-declare i32 @llvm.abs.i32(i32, i1 immarg)
attributes #0 = { "target-cpu"="neoverse-512tvb" }
attributes #1 = { "target-cpu"="grace" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
index 625ca3b2b7284..d9c3ae2e3b533 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
@@ -233,4 +233,3 @@ exit:
ret void
}
-declare i8 @llvm.smax.i8(i8, i8)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
index 3f7688ee373a6..8a780eea300fc 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
@@ -150,4 +150,3 @@ exit:
ret i32 %red.next
}
-declare i8 @llvm.smax.i8(i8, i8)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
index e957c1decc838..f9ba90244c309 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
@@ -248,8 +248,6 @@ while.end: ; preds = %while.body, %entry
ret void
}
-declare i16 @llvm.sadd.sat.i16(i16, i16)
-declare i8 @llvm.umin.i8(i8, i8)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-COST: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
index c43d62404006d..b40875c175187 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
@@ -66,4 +66,3 @@ exit:
ret void
}
-declare double @llvm.pow.f64(double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
index 9462a791dc9de..0c948896ad54c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
@@ -169,7 +169,6 @@ end:
}
-declare double @llvm.exp.f64(double)
; fixed-width variant of exp
declare <2 x double> @exp_fixed(<2 x double>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
index 7fd1aaa4c68c2..b8d326ea350b5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
@@ -964,8 +964,6 @@ end:
declare i64 @foo(i64)
-declare double @llvm.fmuladd.f64(double, double, double)
-declare double @llvm.exp.f64(double)
; fixed-width variants of exp
declare <2 x double> @exp_fixed(<2 x double>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
index 73dbefeb10413..894dc42c84b4c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
@@ -41,4 +41,3 @@ exit: ; preds = %loop
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
index edf7e280d7416..3e61a933d0ecb 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
@@ -76,8 +76,6 @@ exit:
ret i32 %res
}
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.umax.i32(i32, i32)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
index dabff1beefb38..9ca65c5d656fe 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
@@ -217,9 +217,6 @@ for.cond.cleanup: ; preds = %for.body
declare double @foo(double)
declare i64 @bar(ptr)
-declare double @llvm.sin.f64(double)
-declare float @llvm.sin.f32(float)
-declare float @llvm.sqrt.f32(float)
declare <vscale x 2 x double> @foo_vec(<vscale x 2 x double>)
declare <vscale x 2 x i64> @bar_vec(<vscale x 2 x ptr>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
index b897982700400..11d4510d402c3 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
@@ -1656,7 +1656,6 @@ for.end:
ret float %muladd
}
-declare float @llvm.fmuladd.f32(float, float, float)
attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !3, !6, !8}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll b/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
index 17a64357b9116..b99accfacd8f5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
@@ -896,6 +896,5 @@ exit:
ret i32 %min.idx.next
}
-declare i32 @llvm.umin.i32(i32, i32)
attributes #0 = { optsize "target-cpu"="neoverse-v2" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
index 622b269e05950..ac292e408b915 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
@@ -72,7 +72,6 @@ for.end:
ret float %muladd
}
-declare float @llvm.fmuladd.f32(float, float, float)
; CHECK-VF4: Found an estimated cost of 16 for VF 4 For instruction: %muladd = tail call double @llvm.fmuladd.f64(double %0, double %1, double %sum.07)
; CHECK-VF8: Found an estimated cost of 32 for VF 8 For instruction: %muladd = tail call double @llvm.fmuladd.f64(double %0, double %1, double %sum.07)
@@ -97,4 +96,3 @@ for.end:
ret double %muladd
}
-declare double @llvm.fmuladd.f64(double, double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
index 70e771ff0f890..cc38f152ef9f0 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
@@ -1349,7 +1349,6 @@ for.end:
ret float %muladd2
}
-declare float @llvm.fmuladd.f32(float, float, float)
; Test case with invariant store where fadd is strict.
define void @reduction_store_to_invariant_address(ptr %dst, ptr readonly %src) {
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
index 360e7d6a23c19..2e07b27bb6823 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
@@ -450,7 +450,6 @@ for.body:
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
}
-declare i64 @llvm.vscale.i64()
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
attributes #1 = { "target-features"="+sve" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
index c06755d29d172..792564226e2ed 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
@@ -387,7 +387,6 @@ for.end:
ret void
}
-declare float @llvm.tan.f32(float) nounwind readnone
define void @tan_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tan_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_tan_f4(<4 x float>
@@ -411,7 +410,6 @@ for.end:
ret void
}
-declare double @llvm.tan.f64(double) nounwind readnone
define void @tan_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tan_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_tan_d2(<2 x double>
@@ -435,7 +433,6 @@ for.end:
ret void
}
-declare float @llvm.acos.f32(float) nounwind readnone
define void @acos_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @acos_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_acos_f4(<4 x float>
@@ -459,7 +456,6 @@ for.end:
ret void
}
-declare double @llvm.acos.f64(double) nounwind readnone
define void @acos_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @acos_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_acos_d2(<2 x double>
@@ -483,7 +479,6 @@ for.end:
ret void
}
-declare float @llvm.asin.f32(float) nounwind readnone
define void @asin_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @asin_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_asin_f4(<4 x float>
@@ -507,7 +502,6 @@ for.end:
ret void
}
-declare double @llvm.asin.f64(double) nounwind readnone
define void @asin_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @asin_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_asin_d2(<2 x double>
@@ -531,7 +525,6 @@ for.end:
ret void
}
-declare float @llvm.atan.f32(float) nounwind readnone
define void @atan_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_atan_f4(<4 x float>
@@ -555,7 +548,6 @@ for.end:
ret void
}
-declare double @llvm.atan.f64(double) nounwind readnone
define void @atan_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_atan_d2(<2 x double>
@@ -579,7 +571,6 @@ for.end:
ret void
}
-declare float @llvm.atan2.f32(float, float) nounwind readnone
define void @atan2_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan2_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_atan2_f4(<4 x float>
@@ -603,7 +594,6 @@ for.end:
ret void
}
-declare double @llvm.atan2.f64(double, double) nounwind readnone
define void @atan2_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan2_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_atan2_d2(<2 x double>
@@ -627,7 +617,6 @@ for.end:
ret void
}
-declare float @llvm.cosh.f32(float) nounwind readnone
define void @cosh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @cosh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_cosh_f4(<4 x float>
@@ -651,7 +640,6 @@ for.end:
ret void
}
-declare double @llvm.cosh.f64(double) nounwind readnone
define void @cosh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @cosh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_cosh_d2(<2 x double>
@@ -675,7 +663,6 @@ for.end:
ret void
}
-declare float @llvm.sinh.f32(float) nounwind readnone
define void @sinh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @sinh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_sinh_f4(<4 x float>
@@ -699,7 +686,6 @@ for.end:
ret void
}
-declare double @llvm.sinh.f64(double) nounwind readnone
define void @sinh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @sinh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_sinh_d2(<2 x double>
@@ -723,7 +709,6 @@ for.end:
ret void
}
-declare float @llvm.tanh.f32(float) nounwind readnone
define void @tanh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tanh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_tanh_f4(<4 x float>
@@ -747,7 +732,6 @@ for.end:
ret void
}
-declare double @llvm.tanh.f64(double) nounwind readnone
define void @tanh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tanh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_tanh_d2(<2 x double>
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
index f8cbde019eebe..93cf29eba49e8 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
@@ -15,8 +15,6 @@ target triple = "aarch64-unknown-linux-gnu"
; are checking fixed width vectorization with NEON and scalable vectorization
; with SVE.
-declare double @llvm.acos.f64(double)
-declare float @llvm.acos.f32(float)
define void @acos_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @acos_f64
@@ -114,8 +112,6 @@ define void @acos_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.asin.f64(double)
-declare float @llvm.asin.f32(float)
define void @asin_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @asin_f64
@@ -213,8 +209,6 @@ define void @asin_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.atan.f64(double)
-declare float @llvm.atan.f32(float)
define void @atan_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @a...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/190993
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