[llvm] [LV][NFC] Remove unneeded LLVM intrinsic declarations (PR #190993)
David Sherwood via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 8 08:49:14 PDT 2026
https://github.com/david-arm created https://github.com/llvm/llvm-project/pull/190993
We no longer need to declare LLVM intrinsics in .ll files as the intrinsics are populated automatically in the module. Remove the declarations from tests to reduce test noise and size.
This came from a suggestion on PR #190786.
>From e62d9cc1038f488fb47a1fa6570186bde37facca Mon Sep 17 00:00:00 2001
From: David Sherwood <david.sherwood at arm.com>
Date: Wed, 8 Apr 2026 15:46:05 +0000
Subject: [PATCH] [LV][NFC] Remove unneeded LLVM intrinsic declarations
We no longer need to declare LLVM intrinsics in .ll files as
the intrinsics are populated automatically in the module.
Remove the declarations from tests to reduce test noise and
size.
This came from a suggestion on PR #190786.
---
.../LoopVectorize/AArch64/call-costs.ll | 5 --
.../Transforms/LoopVectorize/AArch64/clmul.ll | 1 -
.../AArch64/conditional-branches-cost.ll | 3 -
.../AArch64/drop-poison-generating-flags.ll | 1 -
.../AArch64/epilog-iv-select-cmp.ll | 1 -
.../epilog-vectorization-widen-inductions.ll | 1 -
.../LoopVectorize/AArch64/fminimumnum.ll | 6 --
.../AArch64/force-target-instruction-cost.ll | 2 -
.../AArch64/interleave-with-gaps.ll | 2 -
.../AArch64/interleaving-load-store.ll | 1 -
.../AArch64/interleaving-reduction.ll | 1 -
.../LoopVectorize/AArch64/intrinsiccost.ll | 2 -
.../LoopVectorize/AArch64/licm-calls.ll | 1 -
.../AArch64/masked-call-scalarize.ll | 1 -
.../LoopVectorize/AArch64/masked-call.ll | 2 -
.../pr151664-cost-hoisted-vector-scalable.ll | 1 -
.../LoopVectorize/AArch64/pr73894.ll | 2 -
.../LoopVectorize/AArch64/scalable-call.ll | 3 -
.../AArch64/scalable-strict-fadd.ll | 1 -
.../LoopVectorize/AArch64/select-index.ll | 1 -
.../LoopVectorize/AArch64/strict-fadd-cost.ll | 2 -
.../LoopVectorize/AArch64/strict-fadd.ll | 1 -
.../AArch64/sve-vscale-based-trip-counts.ll | 1 -
.../AArch64/veclib-calls-libsystem-darwin.ll | 16 -----
.../AArch64/veclib-intrinsic-calls.ll | 64 ------------------
.../AMDGPU/buffer-fat-pointer.ll | 1 -
.../ARM/mve-gather-scatter-tailpred.ll | 5 --
.../LoopVectorize/ARM/mve-known-trip-count.ll | 2 -
.../LoopVectorize/ARM/mve-saddsatcost.ll | 1 -
.../LoopVectorize/ARM/mve-selectandorcost.ll | 1 -
.../LoopVectorize/Hexagon/minimum-vf.ll | 3 -
.../LoopVectorize/PowerPC/massv-calls.ll | 16 -----
.../PowerPC/massv-unsupported.ll | 2 -
.../LoopVectorize/PowerPC/vectorize-bswap.ll | 1 -
.../PowerPC/vectorize-only-for-real.ll | 3 -
.../PowerPC/widened-massv-call.ll | 1 -
.../PowerPC/widened-massv-vfabi-attr.ll | 1 -
.../Transforms/LoopVectorize/RISCV/clmul.ll | 1 -
.../LoopVectorize/RISCV/dead-ops-cost.ll | 1 -
.../LoopVectorize/RISCV/fminimumnum.ll | 6 --
.../LoopVectorize/RISCV/reductions.ll | 1 -
.../RISCV/tail-folding-call-intrinsics.ll | 9 ---
.../RISCV/tail-folding-inloop-reduction.ll | 3 -
.../RISCV/tail-folding-reduction.ll | 3 -
.../SystemZ/mem-interleaving-costs-03.ll | 2 -
.../widen-call-with-intrinsic-or-libfunc.ll | 1 -
.../VPlan/interleave-and-scalarize-only.ll | 1 -
.../LoopVectorize/VPlan/vplan-dot-printing.ll | 1 -
.../VPlan/vplan-printing-metadata.ll | 1 -
.../LoopVectorize/VPlan/vplan-printing.ll | 2 -
.../LoopVectorize/X86/amdlibm-calls.ll | 34 ----------
.../Transforms/LoopVectorize/X86/clmul.ll | 1 -
.../LoopVectorize/X86/cost-model.ll | 1 -
.../LoopVectorize/X86/ephemeral-recipes.ll | 1 -
.../LoopVectorize/X86/fminimumnum.ll | 6 --
.../LoopVectorize/X86/gather_scatter.ll | 1 -
.../LoopVectorize/X86/intrinsiccost.ll | 2 -
.../X86/libm-vector-calls-VF2-VF8.ll | 8 ---
.../LoopVectorize/X86/libm-vector-calls.ll | 6 --
.../pointer-runtime-checks-unprofitable.ll | 1 -
.../Transforms/LoopVectorize/X86/pr35432.ll | 2 -
.../LoopVectorize/X86/reg-usage-debug.ll | 1 -
.../LoopVectorize/X86/register-assumption.ll | 1 -
...licate-recipe-with-only-first-lane-used.ll | 1 -
.../X86/replicate-uniform-call.ll | 1 -
.../LoopVectorize/X86/svml-calls.ll | 16 -----
.../LoopVectorize/X86/veclib-calls.ll | 8 ---
.../LoopVectorize/X86/vect.omp.force.ll | 1 -
llvm/test/Transforms/LoopVectorize/assume.ll | 1 -
.../LoopVectorize/dbg-outer-loop-vect.ll | 1 -
.../Transforms/LoopVectorize/dbg.value.ll | 3 -
.../test/Transforms/LoopVectorize/debugloc.ll | 2 -
...umption-constant-size-needs-loop-guards.ll | 1 -
...able-info-from-assumption-constant-size.ll | 1 -
...able-info-from-assumption-variable-size.ll | 1 -
.../Transforms/LoopVectorize/discriminator.ll | 1 -
.../dont-fold-tail-for-divisible-TC.ll | 1 -
...t-order-recurrence-multiply-recurrences.ll | 1 -
llvm/test/Transforms/LoopVectorize/fpsat.ll | 2 -
llvm/test/Transforms/LoopVectorize/funcall.ll | 1 -
.../LoopVectorize/int_sideeffect.ll | 1 -
.../Transforms/LoopVectorize/intrinsic.ll | 67 -------------------
.../Transforms/LoopVectorize/is_fpclass.ll | 1 -
.../test/Transforms/LoopVectorize/lifetime.ll | 18 +++--
.../minimumnum-maximumnum-reductions.ll | 2 -
.../LoopVectorize/minmax_reduction.ll | 8 ---
.../noalias-scope-decl-outer-loop.ll | 1 -
.../LoopVectorize/noalias-scope-decl.ll | 1 -
.../non-widenable-intrinsics-outer-loop.ll | 5 --
.../predicated-multiple-exits.ll | 1 -
.../Transforms/LoopVectorize/pseudoprobe.ll | 1 -
.../LoopVectorize/reduction-inloop-min-max.ll | 2 -
.../LoopVectorize/reduction-inloop.ll | 1 -
.../reuse-lcssa-phi-scev-expansion.ll | 3 -
.../LoopVectorize/scalable-assume.ll | 1 -
.../LoopVectorize/scalable-lifetime.ll | 14 ++--
.../scalable-noalias-scope-decl.ll | 1 -
.../LoopVectorize/select-cmp-multiuse.ll | 1 -
.../LoopVectorize/select-first-index-fp.ll | 7 --
.../LoopVectorize/select-smax-last-index.ll | 2 -
.../LoopVectorize/select-smin-last-index.ll | 2 -
.../LoopVectorize/select-umax-last-index.ll | 2 -
.../LoopVectorize/select-umin-first-index.ll | 2 -
.../LoopVectorize/select-umin-last-index.ll | 2 -
.../LoopVectorize/single_early_exit.ll | 1 -
.../test/Transforms/LoopVectorize/smax-idx.ll | 1 -
.../trip-count-expansion-may-introduce-ub.ll | 1 -
.../vector-intrinsic-call-cost.ll | 1 -
.../vector-loop-backedge-elimination.ll | 1 -
.../vplan-widen-call-instruction.ll | 1 -
110 files changed, 14 insertions(+), 437 deletions(-)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
index 95b4dcb23dd47..8db00fc0809c5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
@@ -201,11 +201,6 @@ exit:
ret void
}
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.umin.i32(i32, i32)
-declare double @llvm.sqrt.f64(double)
-declare double @llvm.powi.f64.i32(double, i32)
-declare i64 @llvm.fshl.i64(i64, i64, i64)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll b/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
index e453fd4f12a3f..e954db25501d6 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/clmul.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -mtriple=aarch64 -mattr=+crypto -S %s | FileCheck %s
-declare i64 @llvm.clmul.i64(i64 %a, i64 %b)
define void @clmul_loop(ptr %a, ptr %b, ptr %c, i64 %n) {
; CHECK-LABEL: define void @clmul_loop(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
index cec944ee831da..00f94e418c108 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
@@ -47,7 +47,6 @@ exit:
ret void
}
-declare double @llvm.fabs.f64(double) #0
define void @loop_dependent_cond(ptr %src, ptr noalias %dst, i64 %N) {
; DEFAULT-LABEL: define void @loop_dependent_cond(
@@ -1407,8 +1406,6 @@ exit:
ret void
}
-declare float @llvm.fmuladd.f32(float, float, float) #1
-declare double @llvm.pow.f64(double, double)
attributes #1 = { "target-cpu"="neoverse-512tvb" }
attributes #2 = { vscale_range(2,2) "target-cpu"="neoverse-512tvb" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll b/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
index f78ce0ac9a32a..872a559e6c9ce 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/drop-poison-generating-flags.ll
@@ -108,4 +108,3 @@ exit:
ret void
}
-declare double @llvm.fabs.f64(double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
index 92ccabc2031a8..f93a573f54f15 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-iv-select-cmp.ll
@@ -234,6 +234,5 @@ exit:
ret i32 %red.next
}
-declare void @llvm.assume(i1 noundef)
attributes #0 = { "target-cpu"="apple-m1" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
index ea9799428f30a..b3304e6c853ca 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
@@ -97,7 +97,6 @@ exit:
ret void
}
-declare void @llvm.assume(i1 noundef)
define void @test_widen_induction(ptr %A, i64 %N) {
; CHECK-LABEL: @test_widen_induction(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll b/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
index 2ace3b6898652..a0504c46a9262 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/fminimumnum.ll
@@ -75,7 +75,6 @@ exit:
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
define void @fmax32(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax32(
@@ -152,7 +151,6 @@ exit:
ret void
}
-declare float @llvm.maximumnum.f32(float, float)
define void @fmin64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin64(
@@ -229,7 +227,6 @@ exit:
ret void
}
-declare double @llvm.minimumnum.f64(double, double)
define void @fmax64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax64(
@@ -306,7 +303,6 @@ exit:
ret void
}
-declare double @llvm.maximumnum.f64(double, double)
define void @fmin16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin16(
@@ -383,7 +379,6 @@ exit:
ret void
}
-declare half @llvm.minimumnum.f16(half, half)
define void @fmax16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax16(
@@ -460,7 +455,6 @@ exit:
ret void
}
-declare half @llvm.maximumnum.f16(half, half)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
index 7b74e42962bfa..2c37201249aaf 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
@@ -910,5 +910,3 @@ exit:
attributes #0 = { "target-features"="+neon,+sve" vscale_range(1,16) }
attributes #1 = { "target-cpu"="neoverse-512tvb" }
-declare void @llvm.assume(i1 noundef)
-declare i64 @llvm.umin.i64(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
index 51c5c907da4ff..30e1aff8e89dd 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleave-with-gaps.ll
@@ -261,9 +261,7 @@ exit:
ret void
}
-declare i32 @llvm.umin.i32(i32, i32)
-declare i32 @llvm.abs.i32(i32, i1 immarg)
attributes #0 = { "target-cpu"="neoverse-512tvb" }
attributes #1 = { "target-cpu"="grace" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
index 625ca3b2b7284..d9c3ae2e3b533 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
@@ -233,4 +233,3 @@ exit:
ret void
}
-declare i8 @llvm.smax.i8(i8, i8)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
index 3f7688ee373a6..8a780eea300fc 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
@@ -150,4 +150,3 @@ exit:
ret i32 %red.next
}
-declare i8 @llvm.smax.i8(i8, i8)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
index e957c1decc838..f9ba90244c309 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
@@ -248,8 +248,6 @@ while.end: ; preds = %while.body, %entry
ret void
}
-declare i16 @llvm.sadd.sat.i16(i16, i16)
-declare i8 @llvm.umin.i8(i8, i8)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-COST: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
index c43d62404006d..b40875c175187 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/licm-calls.ll
@@ -66,4 +66,3 @@ exit:
ret void
}
-declare double @llvm.pow.f64(double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
index 9462a791dc9de..0c948896ad54c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call-scalarize.ll
@@ -169,7 +169,6 @@ end:
}
-declare double @llvm.exp.f64(double)
; fixed-width variant of exp
declare <2 x double> @exp_fixed(<2 x double>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
index 7fd1aaa4c68c2..b8d326ea350b5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
@@ -964,8 +964,6 @@ end:
declare i64 @foo(i64)
-declare double @llvm.fmuladd.f64(double, double, double)
-declare double @llvm.exp.f64(double)
; fixed-width variants of exp
declare <2 x double> @exp_fixed(<2 x double>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
index 73dbefeb10413..894dc42c84b4c 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr151664-cost-hoisted-vector-scalable.ll
@@ -41,4 +41,3 @@ exit: ; preds = %loop
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
index edf7e280d7416..3e61a933d0ecb 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr73894.ll
@@ -76,8 +76,6 @@ exit:
ret i32 %res
}
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.umax.i32(i32, i32)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
index dabff1beefb38..9ca65c5d656fe 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
@@ -217,9 +217,6 @@ for.cond.cleanup: ; preds = %for.body
declare double @foo(double)
declare i64 @bar(ptr)
-declare double @llvm.sin.f64(double)
-declare float @llvm.sin.f32(float)
-declare float @llvm.sqrt.f32(float)
declare <vscale x 2 x double> @foo_vec(<vscale x 2 x double>)
declare <vscale x 2 x i64> @bar_vec(<vscale x 2 x ptr>)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
index b897982700400..11d4510d402c3 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
@@ -1656,7 +1656,6 @@ for.end:
ret float %muladd
}
-declare float @llvm.fmuladd.f32(float, float, float)
attributes #0 = { vscale_range(1, 16) }
!0 = distinct !{!0, !3, !6, !8}
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll b/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
index 17a64357b9116..b99accfacd8f5 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/select-index.ll
@@ -896,6 +896,5 @@ exit:
ret i32 %min.idx.next
}
-declare i32 @llvm.umin.i32(i32, i32)
attributes #0 = { optsize "target-cpu"="neoverse-v2" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
index 622b269e05950..ac292e408b915 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd-cost.ll
@@ -72,7 +72,6 @@ for.end:
ret float %muladd
}
-declare float @llvm.fmuladd.f32(float, float, float)
; CHECK-VF4: Found an estimated cost of 16 for VF 4 For instruction: %muladd = tail call double @llvm.fmuladd.f64(double %0, double %1, double %sum.07)
; CHECK-VF8: Found an estimated cost of 32 for VF 8 For instruction: %muladd = tail call double @llvm.fmuladd.f64(double %0, double %1, double %sum.07)
@@ -97,4 +96,3 @@ for.end:
ret double %muladd
}
-declare double @llvm.fmuladd.f64(double, double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
index 70e771ff0f890..cc38f152ef9f0 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/strict-fadd.ll
@@ -1349,7 +1349,6 @@ for.end:
ret float %muladd2
}
-declare float @llvm.fmuladd.f32(float, float, float)
; Test case with invariant store where fadd is strict.
define void @reduction_store_to_invariant_address(ptr %dst, ptr readonly %src) {
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
index 360e7d6a23c19..2e07b27bb6823 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-vscale-based-trip-counts.ll
@@ -450,7 +450,6 @@ for.body:
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
}
-declare i64 @llvm.vscale.i64()
attributes #0 = { vscale_range(1,16) "target-features"="+sve" }
attributes #1 = { "target-features"="+sve" }
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
index c06755d29d172..792564226e2ed 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-calls-libsystem-darwin.ll
@@ -387,7 +387,6 @@ for.end:
ret void
}
-declare float @llvm.tan.f32(float) nounwind readnone
define void @tan_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tan_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_tan_f4(<4 x float>
@@ -411,7 +410,6 @@ for.end:
ret void
}
-declare double @llvm.tan.f64(double) nounwind readnone
define void @tan_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tan_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_tan_d2(<2 x double>
@@ -435,7 +433,6 @@ for.end:
ret void
}
-declare float @llvm.acos.f32(float) nounwind readnone
define void @acos_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @acos_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_acos_f4(<4 x float>
@@ -459,7 +456,6 @@ for.end:
ret void
}
-declare double @llvm.acos.f64(double) nounwind readnone
define void @acos_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @acos_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_acos_d2(<2 x double>
@@ -483,7 +479,6 @@ for.end:
ret void
}
-declare float @llvm.asin.f32(float) nounwind readnone
define void @asin_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @asin_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_asin_f4(<4 x float>
@@ -507,7 +502,6 @@ for.end:
ret void
}
-declare double @llvm.asin.f64(double) nounwind readnone
define void @asin_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @asin_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_asin_d2(<2 x double>
@@ -531,7 +525,6 @@ for.end:
ret void
}
-declare float @llvm.atan.f32(float) nounwind readnone
define void @atan_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_atan_f4(<4 x float>
@@ -555,7 +548,6 @@ for.end:
ret void
}
-declare double @llvm.atan.f64(double) nounwind readnone
define void @atan_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_atan_d2(<2 x double>
@@ -579,7 +571,6 @@ for.end:
ret void
}
-declare float @llvm.atan2.f32(float, float) nounwind readnone
define void @atan2_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan2_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_atan2_f4(<4 x float>
@@ -603,7 +594,6 @@ for.end:
ret void
}
-declare double @llvm.atan2.f64(double, double) nounwind readnone
define void @atan2_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @atan2_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_atan2_d2(<2 x double>
@@ -627,7 +617,6 @@ for.end:
ret void
}
-declare float @llvm.cosh.f32(float) nounwind readnone
define void @cosh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @cosh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_cosh_f4(<4 x float>
@@ -651,7 +640,6 @@ for.end:
ret void
}
-declare double @llvm.cosh.f64(double) nounwind readnone
define void @cosh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @cosh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_cosh_d2(<2 x double>
@@ -675,7 +663,6 @@ for.end:
ret void
}
-declare float @llvm.sinh.f32(float) nounwind readnone
define void @sinh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @sinh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_sinh_f4(<4 x float>
@@ -699,7 +686,6 @@ for.end:
ret void
}
-declare double @llvm.sinh.f64(double) nounwind readnone
define void @sinh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @sinh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_sinh_d2(<2 x double>
@@ -723,7 +709,6 @@ for.end:
ret void
}
-declare float @llvm.tanh.f32(float) nounwind readnone
define void @tanh_v4f32_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tanh_v4f32_intrinsic(
; CHECK: call <4 x float> @_simd_tanh_f4(<4 x float>
@@ -747,7 +732,6 @@ for.end:
ret void
}
-declare double @llvm.tanh.f64(double) nounwind readnone
define void @tanh_v2f64_intrinsic(i64 %n, ptr noalias %y, ptr noalias %x) {
; CHECK-LABEL: @tanh_v2f64_intrinsic(
; CHECK: call <2 x double> @_simd_tanh_d2(<2 x double>
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
index f8cbde019eebe..93cf29eba49e8 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/veclib-intrinsic-calls.ll
@@ -15,8 +15,6 @@ target triple = "aarch64-unknown-linux-gnu"
; are checking fixed width vectorization with NEON and scalable vectorization
; with SVE.
-declare double @llvm.acos.f64(double)
-declare float @llvm.acos.f32(float)
define void @acos_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @acos_f64
@@ -114,8 +112,6 @@ define void @acos_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.asin.f64(double)
-declare float @llvm.asin.f32(float)
define void @asin_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @asin_f64
@@ -213,8 +209,6 @@ define void @asin_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.atan.f64(double)
-declare float @llvm.atan.f32(float)
define void @atan_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @atan_f64
@@ -312,8 +306,6 @@ define void @atan_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.atan2.f64(double, double)
-declare float @llvm.atan2.f32(float, float)
define void @atan2_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @atan2_f64
@@ -411,8 +403,6 @@ define void @atan2_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.ceil.f64(double)
-declare float @llvm.ceil.f32(float)
define void @ceil_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @ceil_f64
@@ -510,8 +500,6 @@ define void @ceil_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.copysign.f64(double, double)
-declare float @llvm.copysign.f32(float, float)
define void @copysign_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @copysign_f64
@@ -609,8 +597,6 @@ define void @copysign_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.cos.f64(double)
-declare float @llvm.cos.f32(float)
define void @cos_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @cos_f64
@@ -708,8 +694,6 @@ define void @cos_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.cosh.f64(double)
-declare float @llvm.cosh.f32(float)
define void @cosh_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @cosh_f64
@@ -807,8 +791,6 @@ define void @cosh_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.exp.f64(double)
-declare float @llvm.exp.f32(float)
define void @exp_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @exp_f64
@@ -906,8 +888,6 @@ define void @exp_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.exp10.f64(double)
-declare float @llvm.exp10.f32(float)
define void @exp10_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @exp10_f64
@@ -1005,8 +985,6 @@ define void @exp10_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.exp2.f64(double)
-declare float @llvm.exp2.f32(float)
define void @exp2_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @exp2_f64
@@ -1104,8 +1082,6 @@ define void @exp2_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.fabs.f64(double)
-declare float @llvm.fabs.f32(float)
define void @fabs_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @fabs_f64
@@ -1203,8 +1179,6 @@ define void @fabs_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.floor.f64(double)
-declare float @llvm.floor.f32(float)
define void @floor_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @floor_f64
@@ -1302,8 +1276,6 @@ define void @floor_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.fma.f64(double, double, double)
-declare float @llvm.fma.f32(float, float, float)
define void @fma_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @fma_f64
@@ -1401,8 +1373,6 @@ define void @fma_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.log.f64(double)
-declare float @llvm.log.f32(float)
define void @log_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @log_f64
@@ -1500,8 +1470,6 @@ define void @log_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.log10.f64(double)
-declare float @llvm.log10.f32(float)
define void @log10_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @log10_f64
@@ -1599,8 +1567,6 @@ define void @log10_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.log2.f64(double)
-declare float @llvm.log2.f32(float)
define void @log2_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @log2_f64
@@ -1698,8 +1664,6 @@ define void @log2_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.maxnum.f64(double, double)
-declare float @llvm.maxnum.f32(float, float)
define void @maxnum_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @maxnum_f64
@@ -1797,8 +1761,6 @@ define void @maxnum_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.minnum.f64(double, double)
-declare float @llvm.minnum.f32(float, float)
define void @minnum_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @minnum_f64
@@ -1896,8 +1858,6 @@ define void @minnum_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare { double, double } @llvm.modf.f64(double)
-declare { float, float } @llvm.modf.f32(float)
define void @modf_f64(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
; LIBMVEC-NEON-LABEL: define void @modf_f64
@@ -2015,8 +1975,6 @@ define void @modf_f32(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
ret void
}
-declare double @llvm.nearbyint.f64(double)
-declare float @llvm.nearbyint.f32(float)
define void @nearbyint_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @nearbyint_f64
@@ -2114,8 +2072,6 @@ define void @nearbyint_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.pow.f64(double, double)
-declare float @llvm.pow.f32(float, float)
define void @pow_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @pow_f64
@@ -2213,8 +2169,6 @@ define void @pow_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.rint.f64(double)
-declare float @llvm.rint.f32(float)
define void @rint_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @rint_f64
@@ -2312,8 +2266,6 @@ define void @rint_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.round.f64(double)
-declare float @llvm.round.f32(float)
define void @round_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @round_f64
@@ -2411,8 +2363,6 @@ define void @round_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.sin.f64(double)
-declare float @llvm.sin.f32(float)
define void @sin_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @sin_f64
@@ -2510,8 +2460,6 @@ define void @sin_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare { double, double } @llvm.sincos.f64(double)
-declare { float, float } @llvm.sincos.f32(float)
define void @sincos_f64(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
; LIBMVEC-NEON-LABEL: define void @sincos_f64
@@ -2629,8 +2577,6 @@ define void @sincos_f32(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
ret void
}
-declare { double, double } @llvm.sincospi.f64(double)
-declare { float, float } @llvm.sincospi.f32(float)
define void @sincospi_f64(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
; LIBMVEC-NEON-LABEL: define void @sincospi_f64
@@ -2748,8 +2694,6 @@ define void @sincospi_f32(ptr noalias %in.ptr, ptr %out_a.ptr, ptr %out_b.ptr) {
ret void
}
-declare double @llvm.sinh.f64(double)
-declare float @llvm.sinh.f32(float)
define void @sinh_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @sinh_f64
@@ -2847,8 +2791,6 @@ define void @sinh_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.sqrt.f64(double)
-declare float @llvm.sqrt.f32(float)
define void @sqrt_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @sqrt_f64
@@ -2946,8 +2888,6 @@ define void @sqrt_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.tan.f64(double)
-declare float @llvm.tan.f32(float)
define void @tan_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @tan_f64
@@ -3045,8 +2985,6 @@ define void @tan_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.tanh.f64(double)
-declare float @llvm.tanh.f32(float)
define void @tanh_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @tanh_f64
@@ -3144,8 +3082,6 @@ define void @tanh_f32(ptr noalias %in.ptr, ptr %out.ptr) {
ret void
}
-declare double @llvm.trunc.f64(double)
-declare float @llvm.trunc.f32(float)
define void @trunc_f64(ptr noalias %in.ptr, ptr %out.ptr) {
; LIBMVEC-NEON-LABEL: define void @trunc_f64
diff --git a/llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll b/llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
index 26b80967c336a..578c31c54c18e 100644
--- a/llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
+++ b/llvm/test/Transforms/LoopVectorize/AMDGPU/buffer-fat-pointer.ll
@@ -36,4 +36,3 @@ exit: ; preds = %exit
ret void
}
-declare ptr addrspace(8) @llvm.amdgcn.make.buffer.rsrc.p1(ptr addrspace(1) readnone, i16, i64, i32)
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
index 68da4e74cff04..18c420ffd0405 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-gather-scatter-tailpred.ll
@@ -517,8 +517,3 @@ end: ; preds = %end, %entry
ret void
}
-declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)
-declare <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr>, i32, <4 x i1>, <4 x i32>)
-declare <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32, i32)
-declare <4 x i32> @llvm.masked.load.v4i32.p0(ptr, i32, <4 x i1>, <4 x i32>)
-declare void @llvm.masked.scatter.v4i32.v4p0(<4 x i32>, <4 x ptr>, i32, <4 x i1>)
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
index 3a717ea8332aa..387d0ef14aa10 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
@@ -472,7 +472,5 @@ while.end: ; preds = %while.end.loopexit,
}
-declare void @llvm.lifetime.start.p0(ptr)
-declare void @llvm.lifetime.end.p0(ptr)
attributes #0 = { "target-features"="+mve.fp" }
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
index b49377c19ea19..1765b80f19ac9 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
@@ -56,7 +56,6 @@ while.end: ; preds = %while.body, %entry
ret void
}
-declare i16 @llvm.sadd.sat.i16(i16, i16)
attributes #0 = { "target-features"="+mve" }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
index db266d1cd5bcd..114878300afd6 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
@@ -130,7 +130,6 @@ while.end: ; preds = %if.end, %entry
ret float %accum.0.lcssa
}
-declare float @llvm.fabs.f32(float)
attributes #0 = { "target-features"="+mve.fp" }
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
diff --git a/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll b/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
index 4e6f8c23ee805..7c39dda210aed 100644
--- a/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
+++ b/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
@@ -11,8 +11,6 @@ target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i
@g0 = external global ptr, align 4
-declare void @llvm.lifetime.start.p0(ptr nocapture) #0
-declare void @llvm.lifetime.end.p0(ptr nocapture) #0
define hidden fastcc void @f0(ptr nocapture %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i8 zeroext %a5) #1 {
b0:
@@ -150,7 +148,6 @@ b2: ; preds = %b1, %b0
ret void
}
-attributes #0 = { argmemonly }
attributes #1 = { "target-cpu"="hexagonv60" "target-features"="+hvx-length64b,+hvxv60" }
!llvm.module.flags = !{!0}
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
index c90db2bbb4dbe..9ea453287b0a4 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
@@ -5,53 +5,37 @@ declare double @cbrt(double)
declare float @cbrtf(float)
declare double @pow(double, double)
-declare double @llvm.pow.f64(double, double)
declare float @powf(float, float)
-declare float @llvm.pow.f32(float, float)
declare double @sqrt(double)
declare float @sqrtf(float)
declare double @exp(double)
-declare double @llvm.exp.f64(double)
declare float @expf(float)
-declare float @llvm.exp.f32(float)
declare double @exp2(double)
-declare double @llvm.exp2.f64(double)
declare float @exp2f(float)
-declare float @llvm.exp2.f32(float)
declare double @expm1(double)
declare float @expm1f(float)
declare double @log(double)
-declare double @llvm.log.f64(double)
declare float @logf(float)
-declare float @llvm.log.f32(float)
declare double @log1p(double)
declare float @log1pf(float)
declare double @log10(double)
-declare double @llvm.log10.f64(double)
declare float @log10f(float)
-declare float @llvm.log10.f32(float)
declare double @log2(double)
-declare double @llvm.log2.f64(double)
declare float @log2f(float)
-declare float @llvm.log2.f32(float)
declare double @sin(double)
-declare double @llvm.sin.f64(double)
declare float @sinf(float)
-declare float @llvm.sin.f32(float)
declare double @cos(double)
-declare double @llvm.cos.f64(double)
declare float @cosf(float)
-declare float @llvm.cos.f32(float)
declare double @tan(double)
declare float @tanf(float)
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
index 7e85841c420aa..91cc362c845c1 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/massv-unsupported.ll
@@ -6,8 +6,6 @@ target triple = "powerpc64le-unknown-linux-gnu"
declare double @ceil(double) #0
declare float @fabsf(float) #0
-declare double @llvm.sqrt.f64(double) #0
-declare float @llvm.sqrt.f32(float) #0
; Vector counterpart of ceil is unsupported in MASSV library.
define void @ceil_f64(ptr nocapture %varray) {
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
index 4218f111841bd..3694b659e407f 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
@@ -83,4 +83,3 @@ for.end: ; preds = %for.cond.cleanup
ret void
}
-declare i32 @llvm.bswap.i32(i32)
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
index bdfea1f195ebe..f98670885b120 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-only-for-real.ll
@@ -42,12 +42,9 @@ for.body6: ; preds = %for.body6, %for.con
br i1 %exitcond, label %for.cond.cleanup5, label %for.body6
}
-declare void @llvm.lifetime.start(ptr nocapture) #1
-declare void @llvm.lifetime.end(ptr nocapture) #1
declare signext i32 @bar(ptr, ptr) #2
attributes #0 = { "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" }
-attributes #1 = { argmemonly }
attributes #2 = { "target-features"="-altivec,-bpermd,-crypto,-direct-move,-extdiv,-power8-vector,-vsx" }
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
index a0e3ed5acbb0c..61c9fd31a296a 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
@@ -52,4 +52,3 @@ for.end:
ret double %Sum.0
}
-declare double @llvm.sin.f64(double)
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
index bb719aa77d6de..6fcb4763ec9a1 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
@@ -50,7 +50,6 @@ for.end:
ret double %Sum.0
}
-declare double @llvm.sin.f64(double) #0
declare <2 x double> @__sind2_P8(<2 x double>) #0
attributes #0 = { nounwind readnone speculatable willreturn }
attributes #1 = { "vector-function-abi-variant"="_ZGV_LLVM_N2v_llvm.sin.f64(__sind2_P8)" }
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll b/llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
index e6e5b571729b0..9a93d7861e04d 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/clmul.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt -passes=loop-vectorize -mtriple=riscv64 -mattr=+v -S %s | FileCheck %s
-declare i64 @llvm.clmul.i64(i64 %a, i64 %b)
define void @clmul_loop(ptr %a, ptr %b, ptr %c, i64 %n) {
; CHECK-LABEL: define void @clmul_loop(
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll b/llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
index bb926ab181cb7..a006a07cdfaf2 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
@@ -138,7 +138,6 @@ exit:
ret i8 %r
}
-declare i16 @llvm.umax.i16(i16, i16)
; Test case for https://github.com/llvm/llvm-project/issues/106780.
define i32 @cost_of_exit_branch_and_cond_insts(ptr %a, ptr %b, i1 %c, i16 %x) #0 {
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll b/llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
index 723d4f16e289e..682d7b426d5d9 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/fminimumnum.ll
@@ -146,7 +146,6 @@ exit:
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
define void @fmax32(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax32(
@@ -291,7 +290,6 @@ exit:
ret void
}
-declare float @llvm.maximumnum.f32(float, float)
define void @fmin64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin64(
@@ -436,7 +434,6 @@ exit:
ret void
}
-declare double @llvm.minimumnum.f64(double, double)
define void @fmax64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax64(
@@ -581,7 +578,6 @@ exit:
ret void
}
-declare double @llvm.maximumnum.f64(double, double)
define void @fmin16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin16(
@@ -714,7 +710,6 @@ exit:
ret void
}
-declare half @llvm.minimumnum.f16(half, half)
define void @fmax16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax16(
@@ -847,7 +842,6 @@ exit:
ret void
}
-declare half @llvm.maximumnum.f16(half, half)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll b/llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
index ac035ae7fc95a..ea5395ba6ff90 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/reductions.ll
@@ -1253,7 +1253,6 @@ for.end:
ret bfloat %muladd
}
-declare float @llvm.fmuladd.f32(float, float, float)
attributes #0 = { "target-features"="+zfhmin,+zvfhmin"}
attributes #1 = { "target-features"="+zfbfmin,+zvfbfmin"}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
index 62a200d17c8a2..c3656748680a2 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-call-intrinsics.ll
@@ -1253,15 +1253,6 @@ exit:
}
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.smin.i32(i32, i32)
-declare i32 @llvm.umax.i32(i32, i32)
-declare i32 @llvm.umin.i32(i32, i32)
-declare i32 @llvm.ctlz.i32(i32, i1 immarg)
-declare i32 @llvm.cttz.i32(i32, i1 immarg)
-declare i64 @llvm.lrint.i64.f64(double)
-declare i64 @llvm.llrint.i64.f64(double)
-declare i32 @llvm.abs.i32(i32, i1 immarg)
;.
; IF-EVL: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; IF-EVL: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
index 35008d3eea092..1d8315d3d2979 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-inloop-reduction.ll
@@ -1657,9 +1657,6 @@ for.end:
ret i32 %anyof
}
-declare float @llvm.minimum.f32(float, float)
-declare float @llvm.maximum.f32(float, float)
-declare float @llvm.fmuladd.f32(float, float, float)
!0 = distinct !{!0, !1}
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
index 6cb9a10856f05..fac9ef1502945 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-reduction.ll
@@ -1709,9 +1709,6 @@ for.end:
ret i32 %anyof
}
-declare float @llvm.minimum.f32(float, float)
-declare float @llvm.maximum.f32(float, float)
-declare float @llvm.fmuladd.f32(float, float, float)
!0 = distinct !{!0, !1}
diff --git a/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll b/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
index dbab14e5e96fd..cf12ec922b3b0 100644
--- a/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
+++ b/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
@@ -38,6 +38,4 @@ for.cond: ; preds = %for.cond, %func_1.e
br label %for.cond
}
-declare void @llvm.lifetime.start.p0(ptr nocapture)
-declare void @llvm.lifetime.end.p0(ptr nocapture)
declare i64 @safe_sub_func_int64_t_s_s(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
index f0e97253fd6e9..4c9308fee0c71 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/AArch64/widen-call-with-intrinsic-or-libfunc.ll
@@ -147,7 +147,6 @@ exit:
ret void
}
-declare double @llvm.sin.f64(double)
declare <2 x double> @__simd_sin_v2f64(<2 x double>)
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll b/llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
index 0a17319c04d35..994917ec1fbff 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
@@ -62,7 +62,6 @@ exit:
ret void
}
-declare i32 @llvm.smin.i32(i32, i32)
; DBG-LABEL: 'test_scalarize_with_branch_cond'
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
index c0e07854ec89e..9777722ff3ba4 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-dot-printing.ll
@@ -70,4 +70,3 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.sqrt.f32(float) nounwind readnone
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
index 3843eeff52c92..74703d70bb803 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
@@ -81,7 +81,6 @@ exit:
ret void
}
-declare float @llvm.sqrt.f32(float)
define void @test_intrinsic_with_metadata(ptr noalias %A, ptr noalias %B, i32 %n) {
; CHECK-LABEL: VPlan for loop in 'test_intrinsic_with_metadata'
diff --git a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
index 3d97a6e7215fe..eaafbd305bf6c 100644
--- a/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
+++ b/llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing.ll
@@ -467,8 +467,6 @@ exit:
ret void
}
-declare float @llvm.sqrt.f32(float) nounwind readnone
-declare float @llvm.fmuladd.f32(float, float, float)
define void @print_expand_scev(i64 %y, ptr %ptr) {
; CHECK-LABEL: VPlan for loop in 'print_expand_scev'
diff --git a/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
index ecbf70a72a27f..7ad4948c0b353 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
@@ -8,81 +8,51 @@ target triple = "x86_64-unknown-linux-gnu"
declare double @sin(double) #0
declare float @sinf(float) #0
-declare double @llvm.sin.f64(double) #0
-declare float @llvm.sin.f32(float) #0
declare double @cos(double) #0
declare float @cosf(float) #0
-declare double @llvm.cos.f64(double) #0
-declare float @llvm.cos.f32(float) #0
declare double @tan(double) #0
declare float @tanf(float) #0
-declare double @llvm.tan.f64(double) #0
-declare float @llvm.tan.f32(float) #0
declare double @acos(double) #0
declare float @acosf(float) #0
-declare double @llvm.acos.f64(double) #0
-declare float @llvm.acos.f32(float) #0
declare double @asin(double) #0
declare float @asinf(float) #0
-declare double @llvm.asin.f64(double) #0
-declare float @llvm.asin.f32(float) #0
declare double @atan(double) #0
declare float @atanf(float) #0
-declare double @llvm.atan.f64(double) #0
-declare float @llvm.atan.f32(float) #0
declare double @sinh(double) #0
declare float @sinhf(float) #0
-declare double @llvm.sinh.f64(double) #0
-declare float @llvm.sinh.f32(float) #0
declare double @cosh(double) #0
declare float @coshf(float) #0
-declare double @llvm.cosh.f64(double) #0
-declare float @llvm.cosh.f32(float) #0
declare double @tanh(double) #0
declare float @tanhf(float) #0
-declare double @llvm.tanh.f64(double) #0
-declare float @llvm.tanh.f32(float) #0
declare double @pow(double, double) #0
declare float @powf(float, float) #0
-declare double @llvm.pow.f64(double, double) #0
-declare float @llvm.pow.f32(float, float) #0
declare double @exp(double) #0
declare float @expf(float) #0
-declare double @llvm.exp.f64(double) #0
-declare float @llvm.exp.f32(float) #0
declare double @log(double) #0
declare float @logf(float) #0
-declare double @llvm.log.f64(double) #0
-declare float @llvm.log.f32(float) #0
declare double @log2(double) #0
declare float @log2f(float) #0
-declare double @llvm.log2.f64(double) #0
-declare float @llvm.log2.f32(float) #0
declare double @log10(double) #0
declare float @log10f(float) #0
-declare double @llvm.log10.f64(double) #0
-declare float @llvm.log10.f32(float) #0
declare double @sqrt(double) #0
declare float @sqrtf(float) #0
declare double @exp2(double) #0
declare float @exp2f(float) #0
-declare double @llvm.exp2.f64(double) #0
-declare float @llvm.exp2.f32(float) #0
define void @sin_f64(ptr nocapture %varray) {
; CHECK-LABEL: @sin_f64(
@@ -1996,8 +1966,6 @@ attributes #0 = { nounwind readnone }
declare double @exp10(double) #0
declare float @exp10f(float) #0
-declare double @llvm.exp10.f64(double) #0
-declare float @llvm.exp10.f32(float) #0
declare void @sincos(double, ptr, ptr)
declare void @sincosf(float, ptr, ptr)
declare double @erfc(double) #0
@@ -2005,5 +1973,3 @@ declare float @erfcf(float) #0
declare double @cdfnorm(double) #0
declare double @round(double) #0
declare float @roundf(float) #0
-declare double @llvm.round.f64(double) #0
-declare float @llvm.round.f32(float) #0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/clmul.ll b/llvm/test/Transforms/LoopVectorize/X86/clmul.ll
index 3299dc06ff462..37bbcbf028ae2 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/clmul.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/clmul.ll
@@ -2,7 +2,6 @@
; RUN: opt -passes=loop-vectorize -mtriple=x86_64 -mattr=+pclmul -S %s | FileCheck %s --check-prefix=WITH-PCLMUL
; RUN: opt -passes=loop-vectorize -mtriple=x86_64 -mattr=-pclmul -S %s | FileCheck %s --check-prefix=WITH-NO-PCLMUL
-declare i64 @llvm.clmul.i64(i64 %a, i64 %b)
define void @clmul_loop(ptr %a, ptr %b, ptr %c, i64 %n){
; WITH-PCLMUL-LABEL: define void @clmul_loop(
diff --git a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
index 77f305b7115de..d8bf7a2e8b118 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
@@ -957,7 +957,6 @@ exit:
ret void
}
-declare void @llvm.assume(i1 noundef) #0
attributes #0 = { "target-cpu"="penryn" }
attributes #1 = { "target-features"="+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl" }
diff --git a/llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll b/llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
index 8cee513b1802b..ec41caac8e45f 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/ephemeral-recipes.ll
@@ -76,6 +76,5 @@ exit:
ret i32 %final.load
}
-declare void @llvm.assume(i1 noundef)
attributes #0 = { "target-cpu"="skylake-avx512" }
diff --git a/llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll b/llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
index 7ca84b7f0c6fa..20a0bf9dd8847 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/fminimumnum.ll
@@ -77,7 +77,6 @@ exit:
ret void
}
-declare float @llvm.minimumnum.f32(float, float)
define void @fmax32(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax32(
@@ -154,7 +153,6 @@ exit:
ret void
}
-declare float @llvm.maximumnum.f32(float, float)
define void @fmin64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin64(
@@ -231,7 +229,6 @@ exit:
ret void
}
-declare double @llvm.minimumnum.f64(double, double)
define void @fmax64(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax64(
@@ -308,7 +305,6 @@ exit:
ret void
}
-declare double @llvm.maximumnum.f64(double, double)
define void @fmin16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmin16(
@@ -378,7 +374,6 @@ exit:
ret void
}
-declare half @llvm.minimumnum.f16(half, half)
define void @fmax16(ptr noundef readonly captures(none) %input1, ptr noundef readonly captures(none) %input2, ptr noundef writeonly captures(none) %output) {
; CHECK-LABEL: define void @fmax16(
@@ -448,7 +443,6 @@ exit:
ret void
}
-declare half @llvm.maximumnum.f16(half, half)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
index 006be5e88d115..db1b020bf6121 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/gather_scatter.ll
@@ -326,7 +326,6 @@ for.inc:
for.end:
ret void
}
-declare void @llvm.masked.scatter.v16f32.v16p0(<16 x float>, <16 x ptr>, i32, <16 x i1>)
; The same as @foo2 but scatter/gather argument is a vecotr of ptrs with addresspace 1
diff --git a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
index bd1fc6eba4a2e..2a0a168516eeb 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
@@ -258,8 +258,6 @@ while.end: ; preds = %while.body, %entry
ret void
}
-declare i16 @llvm.uadd.sat.i16(i16, i16)
-declare i8 @llvm.fshl.i8(i8, i8, i8)
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-COST: {{.*}}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
index 91d5c52fa43c6..44accfab90c33 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls-VF2-VF8.ll
@@ -471,18 +471,10 @@ attributes #0 = { nounwind readnone }
declare double @sin(double) #0
declare float @sinf(float) #0
-declare double @llvm.sin.f64(double) #0
-declare float @llvm.sin.f32(float) #0
declare double @cos(double) #0
declare float @cosf(float) #0
-declare double @llvm.cos.f64(double) #0
-declare float @llvm.cos.f32(float) #0
declare double @tan(double) #0
declare float @tanf(float) #0
-declare double @llvm.tan.f64(double) #0
-declare float @llvm.tan.f32(float) #0
declare float @expf(float) #0
declare float @powf(float, float) #0
-declare float @llvm.exp.f32(float) #0
declare float @logf(float) #0
-declare float @llvm.pow.f32(float, float) #0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
index e0661301fd90c..b8c560dc9d96d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/libm-vector-calls.ll
@@ -360,14 +360,8 @@ attributes #0 = { nounwind readnone }
declare double @sin(double) #0
declare float @sinf(float) #0
-declare double @llvm.sin.f64(double) #0
-declare float @llvm.sin.f32(float) #0
declare double @cos(double) #0
declare float @cosf(float) #0
-declare double @llvm.cos.f64(double) #0
-declare float @llvm.cos.f32(float) #0
declare float @expf(float) #0
declare float @powf(float, float) #0
-declare float @llvm.exp.f32(float) #0
declare float @logf(float) #0
-declare float @llvm.pow.f32(float, float) #0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll b/llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
index fe96463470d8d..1ae81af9c00df 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pointer-runtime-checks-unprofitable.ll
@@ -5,7 +5,6 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
target triple = "x86_64-unknown-linux"
-declare double @llvm.pow.f64(double, double)
; Test case where the memory runtime checks and vector body is more expensive
; than running the scalar loop.
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll b/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
index 4aa0043e1bedd..e5c7fadb928b2 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
@@ -175,10 +175,8 @@ for.end12: ; preds = %for.cond.for.end12_
ret i32 0
}
-declare void @llvm.lifetime.start.p0(ptr nocapture) #1
declare i32 @goo(...) #2
declare i32 @foo(...) #2
-declare void @llvm.lifetime.end.p0(ptr nocapture) #1
diff --git a/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll b/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
index 5cc1479da176c..7166a59f57162 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
@@ -97,7 +97,6 @@ for.end: ; preds = %for.end.loopexit, %
ret i32 %r.0.lcssa
}
-declare void @llvm.dbg.value(metadata, i64, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!3, !4}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll b/llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
index 473776999d547..1192887ad41c3 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/register-assumption.ll
@@ -26,4 +26,3 @@ loop_body.dim.018: ; preds = %loop_body.dim.018,
br i1 %1, label %loop_header.dim.017.preheader, label %loop_body.dim.018
}
-declare void @llvm.assume(i1)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll b/llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
index cb8ee2513284f..a961ce1c2194c 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/replicate-recipe-with-only-first-lane-used.ll
@@ -266,4 +266,3 @@ exit:
ret float %pow
}
-declare float @llvm.pow.f32(float, float)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll b/llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
index 611a097024134..93cc2cbfe9c01 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/replicate-uniform-call.ll
@@ -57,4 +57,3 @@ exit:
ret void
}
-declare i64 @llvm.smax.i64(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
index 2e78e3632feab..34cf75177ef9f 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/svml-calls.ll
@@ -5,46 +5,30 @@ target triple = "x86_64-unknown-linux-gnu"
declare double @sin(double) #0
declare float @sinf(float) #0
-declare double @llvm.sin.f64(double) #0
-declare float @llvm.sin.f32(float) #0
declare double @cos(double) #0
declare float @cosf(float) #0
-declare double @llvm.cos.f64(double) #0
-declare float @llvm.cos.f32(float) #0
declare double @pow(double, double) #0
declare float @powf(float, float) #0
-declare double @llvm.pow.f64(double, double) #0
-declare float @llvm.pow.f32(float, float) #0
declare double @exp(double) #0
declare float @expf(float) #0
-declare double @llvm.exp.f64(double) #0
-declare float @llvm.exp.f32(float) #0
declare double @log(double) #0
declare float @logf(float) #0
-declare double @llvm.log.f64(double) #0
-declare float @llvm.log.f32(float) #0
declare double @log2(double) #0
declare float @log2f(float) #0
-declare double @llvm.log2.f64(double) #0
-declare float @llvm.log2.f32(float) #0
declare double @log10(double) #0
declare float @log10f(float) #0
-declare double @llvm.log10.f64(double) #0
-declare float @llvm.log10.f32(float) #0
declare double @sqrt(double) #0
declare float @sqrtf(float) #0
declare double @exp2(double) #0
declare float @exp2f(float) #0
-declare double @llvm.exp2.f64(double) #0
-declare float @llvm.exp2.f32(float) #0
define void @sin_f64(ptr nocapture %varray) {
; CHECK-LABEL: @sin_f64(
diff --git a/llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
index 340578eb4b3d5..e9f7494bd13a4 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/veclib-calls.ll
@@ -108,7 +108,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @exp_f32_intrin(
;CHECK: vexpf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.exp.f32(float) nounwind readnone
define void @exp_f32_intrin(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -409,7 +408,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @tan_f32_intrinsic(
;CHECK: vtanf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.tan.f32(float) nounwind readnone
define void @tan_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -459,7 +457,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @asin_f32_intrinsic(
;CHECK: vasinf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.asin.f32(float) nounwind readnone
define void @asin_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -509,7 +506,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @acos_f32_intrinsic(
;CHECK: vacosf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.acos.f32(float) nounwind readnone
define void @acos_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -559,7 +555,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @atan_f32_intrinsic(
;CHECK: vatanf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.atan.f32(float) nounwind readnone
define void @atan_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -609,7 +604,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @sinh_f32_intrinsic(
;CHECK: vsinhf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.sinh.f32(float) nounwind readnone
define void @sinh_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -659,7 +653,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @cosh_f32_intrinsic(
;CHECK: vcoshf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.cosh.f32(float) nounwind readnone
define void @cosh_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
@@ -709,7 +702,6 @@ for.end: ; preds = %for.body, %entry
;CHECK-LABEL: @tanh_f32_intrinsic(
;CHECK: vtanhf{{.*}}<4 x float>
;CHECK: ret void
-declare float @llvm.tanh.f32(float) nounwind readnone
define void @tanh_f32_intrinsic(i32 %n, ptr noalias %y, ptr noalias %x) {
entry:
%cmp6 = icmp sgt i32 %n, 0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll b/llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
index 4c0e07e912c84..dd30c045182e4 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.ll
@@ -79,7 +79,6 @@ for.end:
ret void
}
-declare float @llvm.sin.f32(float) nounwind readnone
; Dummy metadata
!3 = !{!3, !{!"llvm.loop.parallel_accesses", !13}}
diff --git a/llvm/test/Transforms/LoopVectorize/assume.ll b/llvm/test/Transforms/LoopVectorize/assume.ll
index f43d94687de06..17415d1805498 100644
--- a/llvm/test/Transforms/LoopVectorize/assume.ll
+++ b/llvm/test/Transforms/LoopVectorize/assume.ll
@@ -58,7 +58,6 @@ for.end: ; preds = %for.body
ret void
}
-declare void @llvm.assume(i1)
define void @test2(ptr noalias %a, ptr noalias %b) {
; CHECK-LABEL: define void @test2(
diff --git a/llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll b/llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
index 9e2e74d14c95a..8b662cd8f360f 100644
--- a/llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
+++ b/llvm/test/Transforms/LoopVectorize/dbg-outer-loop-vect.ll
@@ -94,7 +94,6 @@ exit: ; preds = %for.cond.cleanup3
ret void, !dbg !23
}
-declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!2, !3}
diff --git a/llvm/test/Transforms/LoopVectorize/dbg.value.ll b/llvm/test/Transforms/LoopVectorize/dbg.value.ll
index d7ddd3078cc3b..d3a7b945c227b 100644
--- a/llvm/test/Transforms/LoopVectorize/dbg.value.ll
+++ b/llvm/test/Transforms/LoopVectorize/dbg.value.ll
@@ -34,11 +34,8 @@ for.end: ; preds = %for.body
ret i32 0, !dbg !25
}
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
-declare void @llvm.dbg.value(metadata, metadata, metadata) #1
attributes #0 = { "fp-contract-model"="standard" "frame-pointer"="non-leaf" "relocation-model"="pic" "ssp-buffers-size"="8" }
-attributes #1 = { readnone }
!llvm.dbg.cu = !{!11}
!llvm.module.flags = !{!14}
diff --git a/llvm/test/Transforms/LoopVectorize/debugloc.ll b/llvm/test/Transforms/LoopVectorize/debugloc.ll
index 15295ad5f0bd0..03417a5f27236 100644
--- a/llvm/test/Transforms/LoopVectorize/debugloc.ll
+++ b/llvm/test/Transforms/LoopVectorize/debugloc.ll
@@ -212,9 +212,7 @@ exit:
; CHECK: [[LOC8]] = !DILocation(line: 650
-declare void @llvm.dbg.declare(metadata, metadata, metadata)
-declare void @llvm.dbg.value(metadata, metadata, metadata)
!llvm.dbg.cu = !{!0}
!llvm.module.flags = !{!18, !27}
diff --git a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
index bc4990f88520a..8f5eccb144484 100644
--- a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
+++ b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size-needs-loop-guards.ll
@@ -183,4 +183,3 @@ exit:
-declare i32 @llvm.smin.i32(i32, i32)
diff --git a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
index 1773b2aab7d87..e8508a2b4681d 100644
--- a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
+++ b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "scalar.ph:" --version 6
; RUN: opt -p loop-vectorize -force-vector-width=2 -S %s | FileCheck %s
-declare void @llvm.assume(i1)
define void @deref_assumption_in_header_constant_trip_count(ptr noalias noundef %a, ptr noalias %b, ptr noalias %c) nofree nosync{
; CHECK-LABEL: define void @deref_assumption_in_header_constant_trip_count(
diff --git a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
index 88403a3e6a750..cb7b201fee2cf 100644
--- a/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
+++ b/llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-variable-size.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 5
; RUN: opt -p loop-vectorize -force-vector-width=2 -S %s | FileCheck %s
-declare void @llvm.assume(i1)
; %a is known dereferenceable via assume for the whole loop.
define void @deref_assumption_in_preheader_non_constant_trip_count_access_i8(ptr noalias noundef %a, ptr noalias %b, ptr noalias %c, i64 %n) nofree nosync {
diff --git a/llvm/test/Transforms/LoopVectorize/discriminator.ll b/llvm/test/Transforms/LoopVectorize/discriminator.ll
index dfff0dfc9c221..ded7258f734e0 100644
--- a/llvm/test/Transforms/LoopVectorize/discriminator.ll
+++ b/llvm/test/Transforms/LoopVectorize/discriminator.ll
@@ -17,7 +17,6 @@
@a = global ptr null, align 8
@b = global ptr null, align 8
-declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
define void @_Z3foov() #0 !dbg !6 {
%1 = load ptr, ptr @b, align 8, !dbg !8, !tbaa !9
diff --git a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
index d43d35aec6524..a9d8eecf16d6c 100644
--- a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
+++ b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
@@ -229,4 +229,3 @@ exit:
ret void
}
-declare void @llvm.assume(i1 noundef) nofree nosync nounwind willreturn
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
index 12d73a3ffe27e..a005c1c8f6793 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
@@ -144,7 +144,6 @@ exit:
ret void
}
-declare float @llvm.fmuladd.f32(float, float, float) #1
define void @test_pr54227(ptr noalias %a, ptr noalias %b) {
; CHECK-LABEL: @test_pr54227(
diff --git a/llvm/test/Transforms/LoopVectorize/fpsat.ll b/llvm/test/Transforms/LoopVectorize/fpsat.ll
index 5c103f70c2121..c6c3edef0ce13 100644
--- a/llvm/test/Transforms/LoopVectorize/fpsat.ll
+++ b/llvm/test/Transforms/LoopVectorize/fpsat.ll
@@ -147,5 +147,3 @@ for.body: ; preds = %for.body.preheader,
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
}
-declare i32 @llvm.fptosi.sat.i32.f32(float)
-declare i32 @llvm.fptoui.sat.i32.f32(float)
diff --git a/llvm/test/Transforms/LoopVectorize/funcall.ll b/llvm/test/Transforms/LoopVectorize/funcall.ll
index c4e61241c1a85..9d86409d7f0d8 100644
--- a/llvm/test/Transforms/LoopVectorize/funcall.ll
+++ b/llvm/test/Transforms/LoopVectorize/funcall.ll
@@ -29,4 +29,3 @@ for.end:
ret void
}
-declare double @llvm.pow.f64(double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/int_sideeffect.ll b/llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
index ae596e59c1e74..03d9ccccec140 100644
--- a/llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
+++ b/llvm/test/Transforms/LoopVectorize/int_sideeffect.ll
@@ -1,6 +1,5 @@
; RUN: opt -S < %s -passes=loop-vectorize -force-vector-width=4 | FileCheck %s
-declare void @llvm.sideeffect()
; Vectorization across a @llvm.sideeffect.
diff --git a/llvm/test/Transforms/LoopVectorize/intrinsic.ll b/llvm/test/Transforms/LoopVectorize/intrinsic.ll
index c46c71d65910d..ced3ae96f315c 100644
--- a/llvm/test/Transforms/LoopVectorize/intrinsic.ll
+++ b/llvm/test/Transforms/LoopVectorize/intrinsic.ll
@@ -25,7 +25,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.sqrt.f32(float)
define void @sqrt_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @sqrt_f64(
@@ -52,7 +51,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.sqrt.f64(double)
define void @sin_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @sin_f32(
@@ -79,7 +77,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.sin.f32(float)
define void @sin_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @sin_f64(
@@ -106,7 +103,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.sin.f64(double)
define void @cos_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @cos_f32(
@@ -133,7 +129,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.cos.f32(float)
define void @cos_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @cos_f64(
@@ -160,7 +155,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.cos.f64(double)
define void @tan_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @tan_f32(
@@ -187,7 +181,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.tan.f32(float)
define void @tan_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @tan_f64(
@@ -214,7 +207,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.tan.f64(double)
define void @exp_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @exp_f32(
@@ -241,7 +233,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.exp.f32(float)
define void @exp_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @exp_f64(
@@ -268,7 +259,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.exp.f64(double)
define void @exp2_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @exp2_f32(
@@ -295,7 +285,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.exp2.f32(float)
define void @exp2_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @exp2_f64(
@@ -322,7 +311,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.exp2.f64(double)
define void @ldexp_f32i32(i32 %n, ptr %y, ptr %x, i32 %exp) {
; CHECK-LABEL: @ldexp_f32i32(
@@ -347,7 +335,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.ldexp.f32.i32(float, i32)
define void @ldexp_f64i32(i32 %n, ptr %y, ptr %x, i32 %exp) {
; CHECK-LABEL: @ldexp_f64i32(
@@ -372,7 +359,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.ldexp.f64.i32(double, i32)
define void @log_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log_f32(
@@ -399,7 +385,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.log.f32(float)
define void @log_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log_f64(
@@ -426,7 +411,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.log.f64(double)
define void @log10_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log10_f32(
@@ -453,7 +437,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.log10.f32(float)
define void @log10_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log10_f64(
@@ -480,7 +463,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.log10.f64(double)
define void @log2_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log2_f32(
@@ -507,7 +489,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.log2.f32(float)
define void @log2_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @log2_f64(
@@ -534,7 +515,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.log2.f64(double)
define void @fabs_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @fabs_f32(
@@ -561,7 +541,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.fabs.f32(float)
define void @fabs_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @fabs_f64(
@@ -588,7 +567,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.fabs(double)
define void @copysign_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @copysign_f32(
@@ -617,7 +595,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.copysign.f32(float, float)
define void @copysign_f64(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @copysign_f64(
@@ -646,7 +623,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.copysign(double, double)
define void @floor_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @floor_f32(
@@ -673,7 +649,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.floor.f32(float)
define void @floor_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @floor_f64(
@@ -700,7 +675,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.floor.f64(double)
define void @ceil_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @ceil_f32(
@@ -727,7 +701,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.ceil.f32(float)
define void @ceil_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @ceil_f64(
@@ -754,7 +727,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.ceil.f64(double)
define void @trunc_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @trunc_f32(
@@ -781,7 +753,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.trunc.f32(float)
define void @trunc_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @trunc_f64(
@@ -808,7 +779,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.trunc.f64(double)
define void @rint_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @rint_f32(
@@ -835,7 +805,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.rint.f32(float)
define void @rint_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @rint_f64(
@@ -862,7 +831,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.rint.f64(double)
define void @nearbyint_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @nearbyint_f32(
@@ -889,7 +857,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.nearbyint.f32(float)
define void @nearbyint_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @nearbyint_f64(
@@ -916,7 +883,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.nearbyint.f64(double)
define void @round_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @round_f32(
@@ -943,7 +909,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.round.f32(float)
define void @round_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @round_f64(
@@ -970,7 +935,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.round.f64(double)
define void @roundeven_f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @roundeven_f32(
@@ -997,7 +961,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.roundeven.f32(float)
define void @roundeven_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @roundeven_f64(
@@ -1024,7 +987,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.roundeven.f64(double)
define void @lround_i32f32(i32 %n, ptr %y, ptr %x) {
@@ -1050,7 +1012,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i32 @llvm.lround.i32.f32(float)
define void @lround_i32f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i32f64(
@@ -1075,7 +1036,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i32 @llvm.lround.i32.f64(double)
define void @lround_i64f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i64f32(
@@ -1100,7 +1060,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.lround.i64.f32(float)
define void @lround_i64f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @lround_i64f64(
@@ -1125,7 +1084,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.lround.i64.f64(double)
define void @llround_i64f32(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @llround_i64f32(
@@ -1150,7 +1108,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.llround.i64.f32(float)
define void @llround_i64f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @llround_i64f64(
@@ -1175,7 +1132,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.llround.i64.f64(double)
define void @fma_f32(i32 %n, ptr %y, ptr %x, ptr %z, ptr %w) {
; CHECK-LABEL: @fma_f32(
@@ -1206,7 +1162,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.fma.f32(float, float, float)
define void @fma_f64(i32 %n, ptr %y, ptr %x, ptr %z, ptr %w) {
; CHECK-LABEL: @fma_f64(
@@ -1237,7 +1192,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.fma.f64(double, double, double)
define void @fmuladd_f32(i32 %n, ptr %y, ptr %x, ptr %z, ptr %w) {
; CHECK-LABEL: @fmuladd_f32(
@@ -1268,7 +1222,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.fmuladd.f32(float, float, float)
define void @fmuladd_f64(i32 %n, ptr %y, ptr %x, ptr %z, ptr %w) {
; CHECK-LABEL: @fmuladd_f64(
@@ -1299,7 +1252,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare double @llvm.fmuladd.f64(double, double, double)
define void @pow_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @pow_f32(
@@ -1328,7 +1280,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.pow.f32(float, float)
define void @pow_f64(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @pow_f64(
@@ -1382,7 +1333,6 @@ for.end: ; preds = %for.body
declare float @fabsf(float) nounwind readnone
-declare double @llvm.pow.f64(double, double)
; Make sure we don't replace calls to functions with standard library function
; signatures but defined with internal linkage.
@@ -1441,7 +1391,6 @@ for.end: ; preds = %for.body
ret void
}
-declare double @llvm.powi.f64.i32(double %Val, i32 %power)
define void @powi_f64(i32 %n, ptr %y, ptr %x, i32 %P) {
; CHECK-LABEL: @powi_f64(
@@ -1494,7 +1443,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.cttz.i64 (i64, i1)
define void @cttz_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @cttz_f64(
@@ -1521,7 +1469,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.ctlz.i64 (i64, i1)
define void @ctlz_f64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @ctlz_f64(
@@ -1548,7 +1495,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.abs.i64 (i64, i1)
define void @abs_i64(i32 %n, ptr %y, ptr %x) {
; CHECK-LABEL: @abs_i64(
@@ -1575,7 +1521,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i32 @llvm.smin.i32 (i32, i32)
define void @smin_i32(i32 %n, ptr %x, ptr %y) {
; CHECK-LABEL: @smin_i32(
@@ -1602,7 +1547,6 @@ end:
ret void
}
-declare i32 @llvm.smax.i32 (i32, i32)
define void @smax_i32(i32 %n, ptr %x, ptr %y) {
; CHECK-LABEL: @smax_i32(
@@ -1629,7 +1573,6 @@ end:
ret void
}
-declare i32 @llvm.umin.i32 (i32, i32)
define void @umin_i32(i32 %n, ptr %x, ptr %y) {
; CHECK-LABEL: @umin_i32(
@@ -1656,7 +1599,6 @@ end:
ret void
}
-declare i32 @llvm.umax.i32 (i32, i32)
define void @umax_i32(i32 %n, ptr %x, ptr %y) {
; CHECK-LABEL: @umax_i32(
@@ -1683,7 +1625,6 @@ end:
ret void
}
-declare i32 @llvm.fshl.i32 (i32, i32, i32)
define void @fshl_i32(i32 %n, ptr %x, ptr %y, i32 %shAmt) {
; CHECK-LABEL: @fshl_i32(
@@ -1710,7 +1651,6 @@ end:
ret void
}
-declare i32 @llvm.fshr.i32 (i32, i32, i32)
define void @fshr_i32(i32 %n, ptr %x, ptr %y, i32 %shAmt) {
; CHECK-LABEL: @fshr_i32(
@@ -1737,7 +1677,6 @@ end:
ret void
}
-declare float @llvm.minnum.f32(float, float)
define void @minnum_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @minnum_f32(
@@ -1766,7 +1705,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.maxnum.f32(float, float)
define void @maxnum_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @maxnum_f32(
@@ -1795,7 +1733,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.minimum.f32(float, float)
define void @minimum_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @minimum_f32(
@@ -1824,7 +1761,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare float @llvm.maximum.f32(float, float)
define void @maximum_f32(i32 %n, ptr %y, ptr %x, ptr %z) {
; CHECK-LABEL: @maximum_f32(
@@ -1853,7 +1789,6 @@ for.end: ; preds = %for.body, %entry
ret void
}
-declare i32 @llvm.lrint.i32.f32(float)
define void @lrint_i32_f32(ptr %x, ptr %y, i64 %n) {
; CHECK-LABEL: @lrint_i32_f32(
@@ -1879,7 +1814,6 @@ exit: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.llrint.i64.f32(float)
define void @llrint_i64_f32(ptr %x, ptr %y, i64 %n) {
; CHECK-LABEL: @llrint_i64_f32(
@@ -1905,7 +1839,6 @@ exit: ; preds = %for.body, %entry
ret void
}
-declare i64 @llvm.clmul.i64(i64 %a, i64 %b)
define void @clmul_i64(ptr %a, ptr %b, ptr %c, i64 %n) {
; CHECK-LABEL: @clmul_i64(
diff --git a/llvm/test/Transforms/LoopVectorize/is_fpclass.ll b/llvm/test/Transforms/LoopVectorize/is_fpclass.ll
index 6c4ee5b7359dc..772bbb5ee45bf 100644
--- a/llvm/test/Transforms/LoopVectorize/is_fpclass.ll
+++ b/llvm/test/Transforms/LoopVectorize/is_fpclass.ll
@@ -42,4 +42,3 @@ exit:
ret void
}
-declare i1 @llvm.is.fpclass.f32(float, i32 immarg)
diff --git a/llvm/test/Transforms/LoopVectorize/lifetime.ll b/llvm/test/Transforms/LoopVectorize/lifetime.ll
index 61e8635774d35..418d8b3c42656 100644
--- a/llvm/test/Transforms/LoopVectorize/lifetime.ll
+++ b/llvm/test/Transforms/LoopVectorize/lifetime.ll
@@ -12,23 +12,23 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
define void @test(ptr %d) {
entry:
%arr = alloca [1024 x i32], align 16
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
%arrayidx = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
%0 = load i32, ptr %arrayidx, align 8
store i32 100, ptr %arrayidx, align 8
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp ne i32 %lftr.wideiv, 128
br i1 %exitcond, label %for.body, label %for.end
for.end:
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
ret void
}
@@ -40,26 +40,24 @@ for.end:
define void @testbitcast(ptr %d) {
entry:
%arr = alloca [1024 x i32], align 16
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
%arrayidx = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
%0 = load i32, ptr %arrayidx, align 8
store i32 100, ptr %arrayidx, align 8
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp ne i32 %lftr.wideiv, 128
br i1 %exitcond, label %for.body, label %for.end
for.end:
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
ret void
}
-declare void @llvm.lifetime.start.p0(ptr nocapture) #1
-declare void @llvm.lifetime.end.p0(ptr nocapture) #1
diff --git a/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll b/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
index 120307629c82e..0d4a8a9991912 100644
--- a/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
+++ b/llvm/test/Transforms/LoopVectorize/minimumnum-maximumnum-reductions.ll
@@ -178,8 +178,6 @@ exit:
ret float %red.next
}
-declare float @llvm.minimumnum.f32(float, float)
-declare float @llvm.maximumnum.f32(float, float)
;.
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
diff --git a/llvm/test/Transforms/LoopVectorize/minmax_reduction.ll b/llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
index 78d14dfa0cee2..6e87323ee2e47 100644
--- a/llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
+++ b/llvm/test/Transforms/LoopVectorize/minmax_reduction.ll
@@ -1211,12 +1211,4 @@ for.body: ; preds = %entry, %for.body
; Make sure any check-not directives are not triggered by function declarations.
; CHECK: declare
-declare i32 @llvm.smin.i32(i32, i32)
-declare i32 @llvm.smax.i32(i32, i32)
-declare i32 @llvm.umin.i32(i32, i32)
-declare i32 @llvm.umax.i32(i32, i32)
-declare float @llvm.minnum.f32(float, float)
-declare float @llvm.maxnum.f32(float, float)
-declare float @llvm.minimum.f32(float, float)
-declare float @llvm.maximum.f32(float, float)
diff --git a/llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll b/llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
index 80667d6d8d288..8020480f0dc65 100644
--- a/llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
+++ b/llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
@@ -63,7 +63,6 @@ exit:
ret void
}
-declare void @llvm.experimental.noalias.scope.decl(metadata)
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.mustprogress"}
diff --git a/llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll b/llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
index 944a987bd04d0..108b39db63bfb 100644
--- a/llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
+++ b/llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
@@ -50,7 +50,6 @@ for.end: ; preds = %for.body
ret void
}
-declare void @llvm.experimental.noalias.scope.decl(metadata)
%struct.data = type { ptr, ptr }
diff --git a/llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll b/llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
index 76da1de53311f..b92ff0fe19370 100644
--- a/llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
+++ b/llvm/test/Transforms/LoopVectorize/non-widenable-intrinsics-outer-loop.ll
@@ -451,11 +451,6 @@ exit:
ret void
}
-declare void @llvm.assume(i1)
-declare void @llvm.lifetime.start.p0(i64, ptr)
-declare void @llvm.lifetime.end.p0(i64, ptr)
-declare void @llvm.sideeffect()
-declare void @llvm.pseudoprobe(i64, i64, i32, i64)
!0 = distinct !{!0, !1, !2}
!1 = !{!"llvm.loop.mustprogress"}
diff --git a/llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll b/llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
index 51bd6339375b9..7d89a15c2ec22 100644
--- a/llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
+++ b/llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
@@ -851,4 +851,3 @@ loop.end:
ret i32 %retval
}
-declare void @llvm.trap()
diff --git a/llvm/test/Transforms/LoopVectorize/pseudoprobe.ll b/llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
index c07d7c84e1bf1..d30dddc367168 100644
--- a/llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
+++ b/llvm/test/Transforms/LoopVectorize/pseudoprobe.ll
@@ -35,7 +35,6 @@ for.end: ; preds = %for.body
-declare void @llvm.pseudoprobe(i64, i64, i32, i64)
!llvm.pseudo_probe_desc = !{!0}
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
index 02ab7085415c4..091f588e1cc96 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop-min-max.ll
@@ -126,7 +126,6 @@ for.end: ; preds = %for.body, %entry
ret i32 %result.0.lcssa
}
-declare i32 @llvm.smin.i32(i32, i32)
define i32 @reduction_umax(ptr nocapture %A, ptr nocapture %B) {
; CHECK-LABEL: define i32 @reduction_umax
@@ -253,4 +252,3 @@ for.end: ; preds = %for.body, %entry
ret i32 %result.0.lcssa
}
-declare i32 @llvm.umax.i32(i32, i32)
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
index 9266ffd5e4bd4..dc2d3d29b90bd 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
@@ -2892,7 +2892,6 @@ for.exit: ; preds = %for.body
ret i32 %add
}
-declare float @llvm.fmuladd.f32(float, float, float)
!6 = distinct !{!6, !7, !8}
!7 = !{!"llvm.loop.vectorize.predicate.enable", i1 true}
diff --git a/llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll b/llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
index 16969dba27725..0f3519f47c665 100644
--- a/llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
+++ b/llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll
@@ -466,6 +466,3 @@ exit:
ret void
}
-declare double @llvm.cos.f64(double) #0
-
-attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-assume.ll b/llvm/test/Transforms/LoopVectorize/scalable-assume.ll
index db482211dc162..4700900266299 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-assume.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-assume.ll
@@ -62,7 +62,6 @@ for.end: ; preds = %for.body
ret void
}
-declare void @llvm.assume(i1)
%struct.data = type { ptr, ptr }
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll b/llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
index c1a004e67c4d9..f39b5be01f986 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-lifetime.ll
@@ -54,23 +54,23 @@ define void @test(ptr %d) {
entry:
%arr = alloca [1024 x i32], align 16
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
br label %for.body
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
%arrayidx = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
%0 = load i32, ptr %arrayidx, align 8
store i32 100, ptr %arrayidx, align 8
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp ne i32 %lftr.wideiv, 128
br i1 %exitcond, label %for.body, label %for.end, !llvm.loop !0
for.end:
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
ret void
}
@@ -126,11 +126,11 @@ entry:
for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%0 = getelementptr [1024 x i32], ptr %arr, i32 0, i64 %indvars.iv
- call void @llvm.lifetime.end.p0(ptr %arr) #1
+ call void @llvm.lifetime.end.p0(ptr %arr)
%arrayidx = getelementptr inbounds i32, ptr %d, i64 %indvars.iv
%1 = load i32, ptr %arrayidx, align 8
store i32 100, ptr %arrayidx, align 8
- call void @llvm.lifetime.start.p0(ptr %arr) #1
+ call void @llvm.lifetime.start.p0(ptr %arr)
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp ne i32 %lftr.wideiv, 128
@@ -140,9 +140,7 @@ for.end:
ret void
}
-declare void @llvm.lifetime.start.p0(ptr nocapture) #1
-declare void @llvm.lifetime.end.p0(ptr nocapture) #1
!0 = distinct !{!0, !1}
!1 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
diff --git a/llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll b/llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
index 7d82daed346ca..a9968f43fd02f 100644
--- a/llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
+++ b/llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
@@ -30,7 +30,6 @@ for.end: ; preds = %for.body
ret void
}
-declare void @llvm.experimental.noalias.scope.decl(metadata)
%struct.data = type { ptr, ptr }
diff --git a/llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll b/llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
index ffb16d07f3ea8..f29af6652c0f8 100644
--- a/llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
@@ -1320,7 +1320,6 @@ exit: ; preds = %for.body
ret i32 %1
}
-declare i32 @llvm.smax.i32(i32, i32)
; Currently, this test-case is not supported.
; int multi_user_cmp_use_store_offset(float* a, int *b, long long n) {
diff --git a/llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll b/llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
index 034097086c04a..df9a15a5b422a 100644
--- a/llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-first-index-fp.ll
@@ -522,10 +522,3 @@ exit:
ret i64 %res
}
-declare float @llvm.minnum.f32(float, float)
-declare float @llvm.maxnum.f32(float, float)
-declare float @llvm.minimum.f32(float, float)
-declare float @llvm.maximum.f32(float, float)
-declare float @llvm.minimumnum.f32(float, float)
-declare float @llvm.maximumnum.f32(float, float)
-declare double @llvm.minnum.f64(double, double)
diff --git a/llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll b/llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
index 98299cfea2d9c..57c072cd402eb 100644
--- a/llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-smax-last-index.ll
@@ -733,5 +733,3 @@ exit:
ret i64 %res
}
-declare i64 @llvm.smax.i64(i64, i64)
-declare i16 @llvm.smax.i16(i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll b/llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
index 96769255ada22..30e9e8f7c91e2 100644
--- a/llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-smin-last-index.ll
@@ -701,5 +701,3 @@ exit:
}
-declare i64 @llvm.smin.i64(i64, i64)
-declare i16 @llvm.smin.i16(i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll b/llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
index 6309af5e58631..f6981c979501a 100644
--- a/llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-umax-last-index.ll
@@ -733,5 +733,3 @@ exit:
ret i64 %res
}
-declare i64 @llvm.umax.i64(i64, i64)
-declare i16 @llvm.umax.i16(i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll b/llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
index 96ca3b5164a45..3f739e6ff8d3d 100644
--- a/llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-umin-first-index.ll
@@ -875,5 +875,3 @@ exit:
ret i64 %res
}
-declare i64 @llvm.umin.i64(i64, i64)
-declare i16 @llvm.umin.i16(i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll b/llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
index 3e69c1907269b..a72febae04c69 100644
--- a/llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
+++ b/llvm/test/Transforms/LoopVectorize/select-umin-last-index.ll
@@ -780,5 +780,3 @@ exit:
}
-declare i64 @llvm.umin.i64(i64, i64)
-declare i16 @llvm.umin.i16(i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/single_early_exit.ll b/llvm/test/Transforms/LoopVectorize/single_early_exit.ll
index f92fa6df140d4..3df12f5ea5706 100644
--- a/llvm/test/Transforms/LoopVectorize/single_early_exit.ll
+++ b/llvm/test/Transforms/LoopVectorize/single_early_exit.ll
@@ -469,7 +469,6 @@ exit:
ret i64 %res
}
-declare i32 @llvm.smin.i32(i32, i32)
@A = external global [100 x {i32, i8} ]
diff --git a/llvm/test/Transforms/LoopVectorize/smax-idx.ll b/llvm/test/Transforms/LoopVectorize/smax-idx.ll
index 6c613e0a9f602..00dbec5fc0677 100644
--- a/llvm/test/Transforms/LoopVectorize/smax-idx.ll
+++ b/llvm/test/Transforms/LoopVectorize/smax-idx.ll
@@ -366,4 +366,3 @@ exit:
ret i64 %spec.select7
}
-declare i64 @llvm.smax.i64(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll b/llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
index 06f6ce536e92c..681fa2ca24dfa 100644
--- a/llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
+++ b/llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
@@ -1304,7 +1304,6 @@ exit:
ret i64 %p
}
-declare i64 @llvm.umax.i64(i64, i64)
;.
diff --git a/llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll b/llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
index f80fb8c445d7f..e05f89c1f0224 100644
--- a/llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/vector-intrinsic-call-cost.ll
@@ -31,4 +31,3 @@ for.body9.us.us: ; preds = %for.body9.us.us, %e
br i1 %exitcond50, label %for.cond6.for.cond.cleanup8_crit_edge.us.us, label %for.body9.us.us
}
-declare i16 @llvm.fshl.i16(i16, i16, i16)
diff --git a/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll b/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
index 8458e841912c6..96bd0903a6ce9 100644
--- a/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
+++ b/llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination.ll
@@ -605,7 +605,6 @@ exit:
ret void
}
-declare void @llvm.assume(i1)
; Test case for https://github.com/llvm/llvm-project/issues/121897.
define void @scev_expand_step(i64 %x, ptr %dst) {
diff --git a/llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll b/llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
index 46f50c18299b9..d0ea7aee308ac 100644
--- a/llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
+++ b/llvm/test/Transforms/LoopVectorize/vplan-widen-call-instruction.ll
@@ -4,7 +4,6 @@
; Test that VPlan native path is able to widen call intructions like
; llvm.sqrt.* intrincis calls.
-declare double @llvm.sqrt.f64(double %0)
define void @widen_call_instruction(ptr noalias nocapture readonly %a.in, ptr noalias nocapture readonly %b.in, ptr noalias nocapture %c.out) {
; CHECK-LABEL: define void @widen_call_instruction(
; CHECK-SAME: ptr noalias readonly captures(none) [[A_IN:%.*]], ptr noalias readonly captures(none) [[B_IN:%.*]], ptr noalias captures(none) [[C_OUT:%.*]]) {
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