[llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)

[Anatoly Trosinenko via llvm-commits]

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atrosinenko wrote:

IIUC this implicitly assumes the "default" `ret x30`, but `AArch64::RET` is a generic AArch64 `ret` with an input register operand. (If my understanding is incorrect, it would be great to have a test with `ret xN` where N is not 30)

https://github.com/llvm/llvm-project/pull/176187